JPH0195756U - - Google Patents
Info
- Publication number
- JPH0195756U JPH0195756U JP19170087U JP19170087U JPH0195756U JP H0195756 U JPH0195756 U JP H0195756U JP 19170087 U JP19170087 U JP 19170087U JP 19170087 U JP19170087 U JP 19170087U JP H0195756 U JPH0195756 U JP H0195756U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- insulator
- semiconductor device
- package body
- covered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012212 insulator Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
第１図は本考案が適用された半導体素子を示す
断面図、第２図は本考案の製造工程を示す説明図
、第３図は従来例を示す図である。
第１図において、１はパツケージ本体、２は信
号用リード、３は絶縁体、４はグランド用リード
である。
FIG. 1 is a sectional view showing a semiconductor device to which the present invention is applied, FIG. 2 is an explanatory view showing the manufacturing process of the present invention, and FIG. 3 is a diagram showing a conventional example. In FIG. 1, 1 is a package body, 2 is a signal lead, 3 is an insulator, and 4 is a ground lead.
Claims (1)
ド２の上面を、絶縁体３を介してグランド用リー
ド４にて覆つたことを特徴とする半導体素子のリ
ード構造。 A lead structure for a semiconductor device, characterized in that the upper surface of each signal lead 2 extending from a package body 1 is covered with a ground lead 4 via an insulator 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19170087U JPH0195756U (en) | 1987-12-16 | 1987-12-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19170087U JPH0195756U (en) | 1987-12-16 | 1987-12-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0195756U true JPH0195756U (en) | 1989-06-26 |
Family
ID=31482598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19170087U Pending JPH0195756U (en) | 1987-12-16 | 1987-12-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0195756U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6319525B1 (en) * | 2017-05-26 | 2018-05-09 | 三菱電機株式会社 | Semiconductor device |
| JP2019192760A (en) * | 2018-04-24 | 2019-10-31 | モレックス エルエルシー | Electronic component |
-
1987
- 1987-12-16 JP JP19170087U patent/JPH0195756U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6319525B1 (en) * | 2017-05-26 | 2018-05-09 | 三菱電機株式会社 | Semiconductor device |
| WO2018216219A1 (en) * | 2017-05-26 | 2018-11-29 | 三菱電機株式会社 | Semiconductor device |
| JP2019192760A (en) * | 2018-04-24 | 2019-10-31 | モレックス エルエルシー | Electronic component |