JPH0316053B2 - - Google Patents

Info

Publication number
JPH0316053B2
JPH0316053B2 JP59068508A JP6850884A JPH0316053B2 JP H0316053 B2 JPH0316053 B2 JP H0316053B2 JP 59068508 A JP59068508 A JP 59068508A JP 6850884 A JP6850884 A JP 6850884A JP H0316053 B2 JPH0316053 B2 JP H0316053B2
Authority
JP
Japan
Prior art keywords
frame
bit
synchronization
counter
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59068508A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60213149A (ja
Inventor
Hiroyuki Sugawara
Kazunari Kuritani
Yoshinori Rokugo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59068508A priority Critical patent/JPS60213149A/ja
Publication of JPS60213149A publication Critical patent/JPS60213149A/ja
Publication of JPH0316053B2 publication Critical patent/JPH0316053B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59068508A 1984-04-06 1984-04-06 同期回路 Granted JPS60213149A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59068508A JPS60213149A (ja) 1984-04-06 1984-04-06 同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59068508A JPS60213149A (ja) 1984-04-06 1984-04-06 同期回路

Publications (2)

Publication Number Publication Date
JPS60213149A JPS60213149A (ja) 1985-10-25
JPH0316053B2 true JPH0316053B2 (enrdf_load_stackoverflow) 1991-03-04

Family

ID=13375716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59068508A Granted JPS60213149A (ja) 1984-04-06 1984-04-06 同期回路

Country Status (1)

Country Link
JP (1) JPS60213149A (enrdf_load_stackoverflow)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555731B2 (enrdf_load_stackoverflow) * 1973-05-31 1980-02-08
JPS57171862A (en) * 1981-04-16 1982-10-22 Fujitsu Ltd Synchronizing circuit

Also Published As

Publication number Publication date
JPS60213149A (ja) 1985-10-25

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees