JPH0314250B2 - - Google Patents

Info

Publication number
JPH0314250B2
JPH0314250B2 JP59072152A JP7215284A JPH0314250B2 JP H0314250 B2 JPH0314250 B2 JP H0314250B2 JP 59072152 A JP59072152 A JP 59072152A JP 7215284 A JP7215284 A JP 7215284A JP H0314250 B2 JPH0314250 B2 JP H0314250B2
Authority
JP
Japan
Prior art keywords
signal
logic
synchronization
frame
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59072152A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60214655A (ja
Inventor
Ikuo Iizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59072152A priority Critical patent/JPS60214655A/ja
Publication of JPS60214655A publication Critical patent/JPS60214655A/ja
Publication of JPH0314250B2 publication Critical patent/JPH0314250B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59072152A 1984-04-11 1984-04-11 フレ−ム同期回路 Granted JPS60214655A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59072152A JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59072152A JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Publications (2)

Publication Number Publication Date
JPS60214655A JPS60214655A (ja) 1985-10-26
JPH0314250B2 true JPH0314250B2 (fr) 1991-02-26

Family

ID=13480994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59072152A Granted JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Country Status (1)

Country Link
JP (1) JPS60214655A (fr)

Also Published As

Publication number Publication date
JPS60214655A (ja) 1985-10-26

Similar Documents

Publication Publication Date Title
US4920535A (en) Demultiplexer system
US3961311A (en) Circuit arrangement for correcting slip errors in receiver of cyclic binary codes
CA1212723A (fr) Systeme de transmission de signaux numeriques
US3938086A (en) Circuit arrangement for correcting slip errors in pcm receivers
JPH0314250B2 (fr)
JPS585543B2 (ja) フレ−ム同期装置
JP3412927B2 (ja) フレーム同期回路
US5463631A (en) Error pulse width expanding circuit
RU1777245C (ru) Устройство дл обнаружени ошибок дискретного канала передачи информации
GB2103053A (en) Improvements relating to transmission of data in blocks
JP2967703B2 (ja) 同期検出回路
JP3290331B2 (ja) ブロック同期処理回路
JP2948894B2 (ja) フレーム同期回路
JPS63116537A (ja) 同期保護回路
KR0120533B1 (ko) 멀티플랙스 아날로그 콤퍼넌트(mac) 방식의 라인 동기검출회로
SU1591019A1 (ru) Устройство для контроля и восстановления информации по модулю два
JP2849952B2 (ja) フレーム同期回路
JPH0630479B2 (ja) フレ−ム同期方式
US3437996A (en) Error correcting circuit
RU2043652C1 (ru) Устройство для сопряжения эвм с каналом связи
JP2591850B2 (ja) フレーム同期回路
JPS63107330A (ja) フレ−ム同期装置の同期保護回路
JPH0528931B2 (fr)
JPH05130172A (ja) コードワード抽出装置
JPS6410975B2 (fr)