JPH0281057U - - Google Patents

Info

Publication number
JPH0281057U
JPH0281057U JP1988159814U JP15981488U JPH0281057U JP H0281057 U JPH0281057 U JP H0281057U JP 1988159814 U JP1988159814 U JP 1988159814U JP 15981488 U JP15981488 U JP 15981488U JP H0281057 U JPH0281057 U JP H0281057U
Authority
JP
Japan
Prior art keywords
diode
semiconductor pellet
capacitor
saturable inductance
diode semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988159814U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988159814U priority Critical patent/JPH0281057U/ja
Publication of JPH0281057U publication Critical patent/JPH0281057U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【図面の簡単な説明】
第1図は本考案の第1実施例を示す回路図、第
2図はその等価回路を示す図、第3図〜第5図は
絶縁物を用いた例を示す各図、第6図はリードタ
イプのダイオードにチツプ型コンデンサを内蔵し
た例を示す図、第7図〜第9図は本考案の第2実
施例を示す回路図、第10図は問題点を説明する
説明図、第11図は従来例を示す回路図である。 図中、1……ハウジング、2,6,8,23…
…リード線、3,4,22……ダイオード半導体
ペレツト、5,7,13,14,17A,17B
,18A,18B,19,25,27〜29……
ボンデイングワイヤ、9,10,24……チツプ
型コンデンサ、11,12,15……絶縁物、1
6……電極、21……パツケージ、26……可飽
和コア。

Claims (1)

    【実用新案登録請求の範囲】
  1. ダイオード半導体ペレツトを収納するパツケー
    ジ内に前記ダイオード半導体ペレツトに並列に接
    続されるコンデンサを内蔵、又は直列に可飽和イ
    ンダクタンスを内蔵、又はコンデンサと可飽和イ
    ンダクタンスを組合せて内蔵させたことを特徴と
    するダイオード。
JP1988159814U 1988-12-08 1988-12-08 Pending JPH0281057U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988159814U JPH0281057U (ja) 1988-12-08 1988-12-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988159814U JPH0281057U (ja) 1988-12-08 1988-12-08

Publications (1)

Publication Number Publication Date
JPH0281057U true JPH0281057U (ja) 1990-06-22

Family

ID=31441347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988159814U Pending JPH0281057U (ja) 1988-12-08 1988-12-08

Country Status (1)

Country Link
JP (1) JPH0281057U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5139160U (ja) * 1974-09-19 1976-03-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5139160U (ja) * 1974-09-19 1976-03-24

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