JPH0267805A - Oscillating circuit - Google Patents

Oscillating circuit

Info

Publication number
JPH0267805A
JPH0267805A JP22016888A JP22016888A JPH0267805A JP H0267805 A JPH0267805 A JP H0267805A JP 22016888 A JP22016888 A JP 22016888A JP 22016888 A JP22016888 A JP 22016888A JP H0267805 A JPH0267805 A JP H0267805A
Authority
JP
Japan
Prior art keywords
battery voltage
circuit
voltage
battery
inverting amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22016888A
Other languages
Japanese (ja)
Inventor
Hideo Fukatsu
深津 英雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP22016888A priority Critical patent/JPH0267805A/en
Publication of JPH0267805A publication Critical patent/JPH0267805A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent information stored in a storage circuit from being erased by stopping the operation of an oscillating circuit at the time of reduction of a battery voltage. CONSTITUTION:When the voltage of a battery 12 is reduced to the level of a detection voltage, a battery voltage detecting circuit 9 inverts the potential level of the control signal from an output terminal O to not only make a MOSFET 6 to the conductive state but also make MOSFETs 4 and 5 to the nonconductive state and equalizes the input of an inverting amplifier 11 to the voltage of a power source VDD and cuts off a bias resistance. By this constitution, the oscillating circuit is stopped without flowing a current to the bias resistance to keep the battery voltage. Thus, the internal state of the circuit is kept without reducing the battery voltage, and information stored in the storage circuit is prevented from being erased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は発振回路に関し、特に相補型MOSFETで構
成される発振回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an oscillation circuit, and more particularly to an oscillation circuit configured with complementary MOSFETs.

〔従来の技術〕[Conventional technology]

従来、この種の発振回路は、電子時計等に使用しなとき
電池電圧が低下した場合、電池電圧検出回路にて電池電
圧レベルを検出し、表示で外部に報知していた。
Conventionally, when this type of oscillation circuit is not used in an electronic watch or the like and the battery voltage drops, the battery voltage detection circuit detects the battery voltage level and notifies the outside via a display.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の発振回路は、電池電圧検出回路で電池電
圧低下を検出し外部に表示にて報知しても、表示を見落
とす場合がある。電子時計等によっては、記憶回路に記
憶された情報を電池交換時に一定時間消去させない構成
をしているものの、電池電圧低下を報知する表示を見落
とし放置された場合、記憶回路に記憶された情報が消去
されてしまうという欠点がある。
In the conventional oscillation circuit described above, even if the battery voltage detection circuit detects a decrease in battery voltage and notifies the user via a display externally, the display may be overlooked. Some electronic watches are configured so that the information stored in the memory circuit is not erased for a certain period of time when the battery is replaced, but if the display notifying the battery voltage drop is overlooked and left unattended, the information stored in the memory circuit may be erased. The disadvantage is that it is erased.

本発明の目的は、電池電圧が低下した場合、発振回路の
動作を停止することにより、電池電圧を低下させず回路
の内部状態を維持し、記憶回路に記憶された情報が消去
されることを防止できる発振回路を提供することにある
An object of the present invention is to maintain the internal state of the circuit without lowering the battery voltage by stopping the operation of the oscillation circuit when the battery voltage decreases, and to prevent information stored in the memory circuit from being erased. An object of the present invention is to provide an oscillation circuit that can prevent the above problems.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の発振回路は、相補型MO3FETからなる反転
増幅器と、該反転増幅器の入力端と出力端との間に接続
された発振素子と、前記反転増幅器の入力端及び出力端
と電源端子間にそれぞれ接続される第1及び第2のコン
デンサと、電池電圧を検出する電池電圧検出回路とを備
える発振回路において、前記電池電圧検出回路の出力信
号により制御される前記第1のコンデンサに並列に接続
されるMOSFETからなるアナログスイッチと、前記
反転増幅器の入力端と出力端に接続されるバイアス抵抗
としてのMOSFETからなるアナログスイッチとを含
んで構成される。
The oscillation circuit of the present invention includes an inverting amplifier made of complementary MO3FETs, an oscillation element connected between the input end and the output end of the inverting amplifier, and a power supply terminal connected between the input end and the output end of the inverting amplifier and the power supply terminal. In an oscillation circuit comprising first and second capacitors connected to each other and a battery voltage detection circuit for detecting battery voltage, connected in parallel to the first capacitor controlled by an output signal of the battery voltage detection circuit. and an analog switch consisting of a MOSFET as a bias resistor connected to the input terminal and output terminal of the inverting amplifier.

〔作用〕[Effect]

本発明によれば、電子時計等に使用されている電池の電
圧が減少してきた場合、ある設定電圧を電池電圧検出回
路にて検出し、反転増幅器の入力側に接続されるMOS
 F ETからなるアナログスイッチのゲートと反転増
幅器のバイアス抵抗に使用されるMOS F ETから
なるアナログスイッチのゲートに電池電圧検出回路から
制御信号を印加し、反転増幅器の入力を電源電圧と同電
圧に維持し、更に、バイアス抵抗を切断することにより
、バイアス抵抗に電流を流すことなく発振回路を停止し
て回路動作を停止し、電池電圧を低下させず回路の内部
状態を維持し、記憶回路に記憶された情報が消去される
ことを防止できる。
According to the present invention, when the voltage of a battery used in an electronic watch or the like decreases, a certain set voltage is detected by a battery voltage detection circuit, and a MOS connected to the input side of an inverting amplifier is detected.
A control signal is applied from the battery voltage detection circuit to the gate of the analog switch consisting of FET and the gate of the analog switch consisting of MOS FET used for the bias resistance of the inverting amplifier, and the input of the inverting amplifier is set to the same voltage as the power supply voltage. Furthermore, by disconnecting the bias resistor, the oscillation circuit is stopped and the circuit operation is stopped without current flowing through the bias resistor, and the internal state of the circuit is maintained without lowering the battery voltage. It is possible to prevent stored information from being erased.

〔実施例〕〔Example〕

次に、本発明の実施例を図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の回路図である。FIG. 1 is a circuit diagram of an embodiment of the present invention.

第1図に示すように、本実施例は、発振素子1の一端を
反転増幅器11のPチャネル型のMOSFET2とNチ
ャネル型のMOSFET3のゲートとバイアス抵抗に使
用するPチャネル型のMOSFET4とNチャネル型の
MOSFET5のソースと第1のコンデンサ8の一端と
コンデンサ8に並列に接続されたPチャネル型のMOS
FET6のドレインに接続し、コンデンサ8の他端とM
OSFET6のソースはVl)D電源の電源端子に接続
し、反転増幅器11のMOSFET2のソースはVDD
電源の電源端子に接続し、ドレインはMOSFET3の
トレインとバイアス抵抗に使用するMOSFET4と5
のドレインと第2のコンデンサ7の一端と発振素子1の
他端に接続し、MOSFET3のソースはVss電源の
電源端子に接続し、コンデンサ7の他端はVDD電源の
電源端子に接続する。MOSFET4のゲートはインバ
ータ10の出力に接続し、インバータ10の入力とMO
SFET5.6のゲートは電池電圧検出回路9の出力端
子0に接続し、電池電圧検出回路9の入力端子■ssは
電池12のマイナス側に接続し、電池12のプラス側は
VDD電源の電源端子に接続する。
As shown in FIG. 1, in this embodiment, one end of the oscillation element 1 is used as the gate and bias resistor of P-channel MOSFET 2 and N-channel MOSFET 3 of an inverting amplifier 11. A P-channel type MOS connected in parallel to the source of the type MOSFET 5, one end of the first capacitor 8, and the capacitor 8.
Connected to the drain of FET6, and connected to the other end of capacitor 8 and M
The source of OSFET6 is connected to the power supply terminal of the Vl)D power supply, and the source of MOSFET2 of the inverting amplifier 11 is connected to VDD.
Connected to the power supply terminal of the power supply, and the drain is connected to the train of MOSFET 3 and MOSFETs 4 and 5 used for bias resistance.
The drain of the MOSFET 3 is connected to one end of the second capacitor 7 and the other end of the oscillation element 1, the source of the MOSFET 3 is connected to the power terminal of the Vss power supply, and the other end of the capacitor 7 is connected to the power terminal of the VDD power supply. The gate of MOSFET4 is connected to the output of inverter 10, and the input of inverter 10 and MOSFET4 are connected to the output of inverter 10.
The gate of SFET 5.6 is connected to the output terminal 0 of the battery voltage detection circuit 9, the input terminal ■ss of the battery voltage detection circuit 9 is connected to the negative side of the battery 12, and the positive side of the battery 12 is connected to the power supply terminal of the VDD power supply. Connect to.

本実施例においては、反転増幅器11の入力端に接続さ
れるMOSFET6と反転増幅器11のバイアス抵抗に
使用されるMO3F、ET4 5のゲートに電池電圧検
出回路9の出力端子Oがらの制御信号を印加してMOS
FET6とMOSFET4,5とを制御している。
In this embodiment, a control signal from the output terminal O of the battery voltage detection circuit 9 is applied to the MOSFET 6 connected to the input terminal of the inverting amplifier 11 and the gates of MO3F and ET4 5 used for the bias resistance of the inverting amplifier 11. and MOS
It controls FET 6 and MOSFETs 4 and 5.

電池電圧検出回路9は出力端子○から制御信号として通
常は高電圧レベルを出力してMO3FF。
The battery voltage detection circuit 9 normally outputs a high voltage level as a control signal from the output terminal ○ to MO3FF.

T6を非導通状態とし、更に、MOSFET4゜5を導
通状態としてバイアス抵抗として使用している。
T6 is made non-conductive, and MOSFET 4.5 is made conductive and used as a bias resistor.

電池電圧検出回路9は電池12の電圧が検出電圧のレベ
ルまで低下しな時点で、出力端子○からの制御信号の電
位レベルを反転することにより、MOSFET6を導通
状態とし、かつMOSFET4,5を非導通状態として
、反転増幅器11の入力をVoot源の電圧と同電圧と
し、更に、バイアス抵抗を切断する。以上の動作により
、バイアス抵抗に電流を流すことなく発振回路を停止さ
せ電池電圧を維持することができる。
The battery voltage detection circuit 9 turns the MOSFET 6 into a conductive state and turns the MOSFETs 4 and 5 into a non-conducting state by inverting the potential level of the control signal from the output terminal ○ when the voltage of the battery 12 does not fall to the detection voltage level. In the conductive state, the input of the inverting amplifier 11 is set to the same voltage as the voltage of the Voot source, and the bias resistor is further disconnected. With the above operation, the oscillation circuit can be stopped and the battery voltage can be maintained without flowing current through the bias resistor.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、電池電圧検出回路により
電池電圧の低下を検出したとき、電池電圧検出回路から
出力される制御信号により反転増幅器の入力を電源電圧
と同電圧とし、更に、バイアス抵抗を切断して、バイア
ス抵抗に電流を流すことなく発振回路を停止して回路動
作を停止することにより、電池電圧を低下させず回路の
内部状態を維持し、記憶回路に記憶された情報が消去さ
れることを防止できる効果がある。
As explained above, in the present invention, when a decrease in battery voltage is detected by the battery voltage detection circuit, the input of the inverting amplifier is set to the same voltage as the power supply voltage by the control signal output from the battery voltage detection circuit, and furthermore, the bias resistance By disconnecting the oscillation circuit and stopping circuit operation without flowing current through the bias resistor, the internal state of the circuit is maintained without lowering the battery voltage, and the information stored in the memory circuit is erased. It has the effect of preventing this from happening.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の回路図である。 1・・・発振素子、2,4.6・・・Pチャネル型のM
OSFET、3.5・ Nチャネル型のMOSFET、
7,8・・・コンデンサ、9・・・電池電圧検出回路、
10・・・インバータ、11・・・反転増幅器、12・
・・電池。 代理人 弁理士  内 原  晋 昂
FIG. 1 is a circuit diagram of an embodiment of the present invention. 1... Oscillation element, 2, 4.6... P channel type M
OSFET, 3.5/N-channel MOSFET,
7, 8... Capacitor, 9... Battery voltage detection circuit,
10... Inverter, 11... Inverting amplifier, 12...
··battery. Agent: Susumuaki Uchihara, patent attorney

Claims (1)

【特許請求の範囲】[Claims] 相補型MOSFETからなる反転増幅器と、該反転増幅
器の入力端と出力端との間に接続された発振素子と、前
記反転増幅器の入力端及び出力端と電源端子間にそれぞ
れ接続される第1及び第2のコンデンサと、電池電圧を
検出する電池電圧検出回路とを備える発振回路において
、前記電池電圧検出回路の出力信号により制御される前
記第1のコンデンサに並列に接続されるMOSFETか
らなるアナログスイッチと、前記反転増幅器の入力端と
出力端に接続されるバイアス抵抗としてのMOSFET
からなるアナログスイッチとを含むことを特徴とする発
振回路。
an oscillation element connected between an input terminal and an output terminal of the inverting amplifier; In an oscillation circuit comprising a second capacitor and a battery voltage detection circuit for detecting battery voltage, an analog switch comprising a MOSFET connected in parallel to the first capacitor controlled by an output signal of the battery voltage detection circuit. and a MOSFET as a bias resistor connected to the input terminal and output terminal of the inverting amplifier.
An oscillation circuit comprising an analog switch consisting of:
JP22016888A 1988-09-01 1988-09-01 Oscillating circuit Pending JPH0267805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22016888A JPH0267805A (en) 1988-09-01 1988-09-01 Oscillating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22016888A JPH0267805A (en) 1988-09-01 1988-09-01 Oscillating circuit

Publications (1)

Publication Number Publication Date
JPH0267805A true JPH0267805A (en) 1990-03-07

Family

ID=16746951

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22016888A Pending JPH0267805A (en) 1988-09-01 1988-09-01 Oscillating circuit

Country Status (1)

Country Link
JP (1) JPH0267805A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57101434A (en) * 1980-12-16 1982-06-24 Toshiba Corp Oscillator
JPS5937628B2 (en) * 1975-11-10 1984-09-11 三菱電機株式会社 Shiyogatsuushinsouchi
JPS62132405A (en) * 1985-12-04 1987-06-15 Toshiba Corp Crystal oscillation circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5937628B2 (en) * 1975-11-10 1984-09-11 三菱電機株式会社 Shiyogatsuushinsouchi
JPS57101434A (en) * 1980-12-16 1982-06-24 Toshiba Corp Oscillator
JPS62132405A (en) * 1985-12-04 1987-06-15 Toshiba Corp Crystal oscillation circuit

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