JPH0266967A - Cell structure of dynamic random-access memory - Google Patents

Abstract

PURPOSE:To obtain an insulating oxide film having excellent quality and to improve reliability by transforming polysilicon into a single crystal by laser annealing or lamp annealing before a capacitor insulating film is formed. CONSTITUTION:Second polysilicon 9 is deposited on a CVD oxide film 7. Thereafter, patterning for a desired storage node is performed for the second polysilicon 9. Then laser annealing or lamp annealing is performed in order to transform the second polysilicon 9 into a single crystal. At this time, in the second polysilicon 9, the single crystal starts growing from the interface between the second polysilicon 9 and a silicon substrate 1 in the same axial direction of the silicon substrate 1. The entire second polysilicon 9 is transformed into the single crystal, and a single crystal storage node 12 is obtained. Thereafter, the single crystal storage node 12 undergoes thermal oxidation for forming a capacitor insulating film 10. Third polysilicon 11 which is to become another electrode of a capacitor is deposited.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a cell structure of a dynamic random access memory (hereinafter referred to as DRAM), and in particular, polysilicon serves as one conductive electrode of a capacitor, and The present invention relates to a RAM cell structure in which an insulating film of a capacitor is formed on the insulating film, and polysilicon is further formed thereon to serve as the other conductive electrode of the capacitor.

[Prior art] In recent years, semiconductor integrated circuits have become highly integrated, and in particular, DRAM
is progressing ahead of the pack by increasing capacity and miniaturizing it. D
For RAM, a problem associated with miniaturization is a decrease in cell capacity. This reduction in cell capacity not only reduces the sense margin of the DRAM circuit, but also causes a serious problem in that information in the memory is destroyed when it is hit by alpha rays (this is called a soft error).

For this reason, various efforts have been made to increase the capacitance of capacitors, which are the constituent elements of DRAM cells. Among them, there is a cell stacking type stacked cell.

An example of a conventional stacked cell will be described below with reference to FIGS. 3A to 3G and FIG. 4. First, as shown in FIG. 3A, LO is placed on a P-type silicon substrate 1.
Field oxide film 2 is thermally oxidized by the COS method, and gate oxide film 3 is further formed except for the 6f1 area of field oxide film 2.

A first polysilicon 4, which will become a gate electrode, is deposited on the field oxide film 2 and the gate oxide film 3, and the gate electrode is patterned, as shown in FIG. 3B.
Gate oxide film 3 is etched using polysilicon 4 as a mask.

A game consisting of a first polysilicon 4 on a silicon substrate 1)
[As shown in FIG. 3C, source/drain 5 is formed on both sides of the pole by ion implantation. Furthermore, iB
As shown in Figure D, a thermal oxide film 6 is formed over the entire surface, and a CVD oxide film 7 is deposited thereon.

Next, as shown in FIG. 3E, a buried contact 8 is opened by photolithography and oxide film dry etching, and a second polysilicon 9, which will become a storage node electrode, is deposited thereon. Next, as shown in FIG. 3F, the second polycondensate 9 is etched to define the storage node by μm.Furthermore, as shown in FIG. 3G, the second polycondensate 9 is thermally oxidized. , a capacitor insulating film 10 is formed, and a third polysilicon 11 serving as a cell plate is deposited thereon.In this way, a stacked cell is manufactured.

[Problem to be solved by the invention] By the way, a one-transistor, one-capacitor type DRAM
The configuration of the capacitor in the cell is a parallel plate type capacitor consisting of a junction capacitor and an insulating oxide film at the crotch.
In the case of a stacked cell, a capacitor composed of a second polysilicon 9, a capacitor insulating film 10, a third polysilicon 11, a second polysilicon layer and a silicon substrate 1
The junction capacitance on the source/drain region 5 side where these are connected becomes a capacitor.

A particular problem in such a stacked cell configuration is that the capacitor insulating film 10 is formed by oxidizing the second polysilicon 9 mentioned above. In conventional parallel plate capacitors, the silicon substrate is made by thermal oxidation, so a high quality film can be obtained even with a very thin oxide film of about 100 layers. However, in the case of stacked cells, although the cell area is small, the polysilicon is oxidized, which poses a reliability problem. FIG. 4 shows this situation.

FIG. 4 is an enlarged view of the second polysilicon, the capacitor insulating film, and the third polysilicon.

In FIG. 4, when the second polysilicon 9 is viewed microscopically, the polysilicon is divided into grains and there are irregularities on the surface. Normally, polysilicon becomes C at around 600℃.
Since the polysilicon is deposited by the VD method and the subsequent thermal oxidation is performed at 900° C. or higher, the polysilicon grains grow to a large size as shown in FIG. If polysilicon with this unevenness is oxidized, the unevenness will be maintained as it is.
Further on top of that is a third polysilicon 1 which will become a cell plate.
1 is deposited.

An oxide film having the structure shown in FIG. 4 has a problem in that electric field concentration occurs and dielectric breakdown is likely to occur in a high temperature bias stress test.

Therefore, the main object of the present invention is to provide a RAM cell structure that allows a high quality capacitor insulating film to be obtained.

[Means for Solving the Problems] This invention provides a silicon substrate and a region of opposite conductivity type, a polysilicon connected to the region becomes one conductive electrode of the capacitor, and an insulating film of the capacitor is formed on the polysilicon. is formed, and further has polysilicon serving as the other conductive electrode of the capacitor,
It is constructed with a capacitor in which a thermal silicon oxide film is formed after the lower layer polysilicon is made into a single crystal.

[Function] In the DRAM cell structure according to the present invention, a high-quality insulating oxide film can be obtained by crystallizing polysilicon by, for example, laser annealing or lamp annealing (11) before forming a capacitor insulating film. .

[Embodiment of the Invention] FIGS. 1A to 1H are diagrams for explaining a manufacturing method according to an embodiment of the present invention. Of FIGS. 1A to 1H, the steps shown in FIGS. 1A to 1E are the same as the steps described in FIGS. 3A to 3E, so detailed explanation thereof will be omitted.

Features of the invention are illustrated in FIGS. 1F-1H. That is, as shown in FIG. 1E, the CVD oxide film 7
After the second polysilicon 9 is deposited thereon, the second polysilicon 9 is patterned into a desired storage node, as shown in FIG. 1F. And the first
As shown in Figure G, laser annealing or lamp annealing is performed to make the second polysilicon 9 into a single crystal. At this time, a single crystal of the second polysilicon 9 begins to grow from the interface between the second polysilicon 9 and the silicon substrate 1 in the same axial direction as the silicon substrate 1, and soon all the second polysilicon 9 or 111 crystals are grown. +1 becomes the crystal storage node 12.

Thereafter, as shown in FIG. 1H, the capacitor insulating film 10
To form a single crystal storage node 12, the single crystal storage node 12 is thermally oxidized and a third polysilicon 11, which becomes the pole of the other capacitor 7, is deposited.

By monocrystallizing the second polysilicon 9 as described above, the plane of the single-crystal storage node 12 becomes extremely flat, even when viewed microscopically, as shown in FIG. Therefore, the subsequent capacitor insulating film 10 can also be made very flat. Therefore, local electric field concentration can be suppressed, and highly reliable film formation can be achieved.

Note that in the above embodiment, the capacitor insulating film 10 is
A single crystal polysilicon 9 was formed using only a thermal silicon oxide film, but in order to further improve reliability,
A thermal silicon nitride film may also be deposited.

[Effects of the Invention] As described above, according to the present invention, polyrecon is made into a single crystal by laser annealing or lamp annealing before forming the capacitor insulating film.
A high quality insulating oxide film can be obtained and reliability can be improved.

[Brief explanation of the drawing]

FIGS. 1A to 1H are diagrams for explaining a manufacturing method according to an embodiment of the present invention. FIG. 2 is an enlarged cross-sectional view 111 showing a crystal storage node, a third polysilicon, and a capacitor insulating film. FIGS. 38 to 3G are diagrams for explaining a conventional DRAM cell manufacturing method. FIG. 4 is an enlarged cross-sectional view showing a conventional second polysilicon, a capacitor insulating film, and a third polysilicon. In the figure, 1 is a silicon substrate, 2 is a field oxide film, 3 is a gate oxide film, 4 is a first polysilicon, 5 is a source/drain region, 6 is a thermal silicon oxide film, and 7 is a CVD film.
A silicon oxide film, 8 a buried contact region, 9 a second polysilicon, 10 a capacitor insulating film, 11 a third polysilicon, and 12 a single crystal storage node. 1st Eighth Swords, 8th Country, 1D

Claims (1)

[Claims] The polysilicon substrate has a conductivity type region opposite to that of the silicon substrate, and the polysilicon connected to the region becomes one conductive electrode of the capacitor, and an insulating film of the capacitor is formed thereon. A dynamic random access memory having polysilicon thereon which serves as the other conductive electrode of the capacitor, characterized in that it includes a capacitor on which a thermal silicon oxide film is formed after the lower layer polysilicon is single crystallized.
Cell structure of dynamic random access memory.