JPH0256447U - - Google Patents
Info
- Publication number
- JPH0256447U JPH0256447U JP13463288U JP13463288U JPH0256447U JP H0256447 U JPH0256447 U JP H0256447U JP 13463288 U JP13463288 U JP 13463288U JP 13463288 U JP13463288 U JP 13463288U JP H0256447 U JPH0256447 U JP H0256447U
- Authority
- JP
- Japan
- Prior art keywords
- seal ring
- multilayer ceramic
- hole
- small holes
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 238000005219 brazing Methods 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000000463 material Substances 0.000 description 1
Landscapes
- Ceramic Products (AREA)
Description
第1図は本考案にかかるシールリング付多層セ
ラミツクス基板の斜視図、第2図はその分解斜視
図、第3図はその断面図、第4図は従来例の断面
図である。
図中、1……シールリング付多層セラミツクス
基板、2……多層セラミツクス基板、3……穴、
4……シールリング、5……薄板の銀ろう材、3
2……開口部、33……小穴、41……小突起、
51……孔。
FIG. 1 is a perspective view of a multilayer ceramic substrate with a seal ring according to the present invention, FIG. 2 is an exploded perspective view thereof, FIG. 3 is a sectional view thereof, and FIG. 4 is a sectional view of a conventional example. In the figure, 1... multilayer ceramic substrate with seal ring, 2... multilayer ceramic substrate, 3... hole,
4... Seal ring, 5... Thin plate of silver brazing material, 3
2...Opening, 33...Small hole, 41...Small protrusion,
51... hole.
Claims (1)
を形成した半導体素子を搭載する穴を形成すると
ともに、該穴の開口部を取り巻くシールリングを
銀ろう付け等で接合してなるシールリング付多層
セラミツクスパツケージにおいて、 前記多層セラミツクス基板上には、穴の開口部
を取り巻く複数個の小穴を形成し、シールリング
には、複数個の小穴に対応する複数個の小突起を
形成し、多層セラミツクス基盤とシールリング相
互の位置決めに小穴および小突起を利用して、シ
ールリングを接合したことを特徴とするシールリ
ング付多層セラミツクスパツケージ。[Claim for Utility Model Registration] A hole is formed in the center of a multilayer ceramic substrate for mounting a semiconductor element forming an integrated circuit, and a seal ring surrounding the opening of the hole is bonded by silver brazing or the like. In the multilayer ceramic package with a seal ring, a plurality of small holes surrounding the opening of the hole are formed on the multilayer ceramic substrate, and a plurality of small protrusions corresponding to the plurality of small holes are formed on the seal ring. A multilayer ceramic spat cage with a seal ring, characterized in that the seal ring is joined to the multilayer ceramic base by using small holes and small protrusions for mutual positioning of the multilayer ceramic base and the seal ring.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13463288U JPH0256447U (en) | 1988-10-14 | 1988-10-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13463288U JPH0256447U (en) | 1988-10-14 | 1988-10-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0256447U true JPH0256447U (en) | 1990-04-24 |
Family
ID=31393568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13463288U Pending JPH0256447U (en) | 1988-10-14 | 1988-10-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0256447U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006066721A (en) * | 2004-08-27 | 2006-03-09 | Mitsubishi Electric Corp | Semiconductor package |
-
1988
- 1988-10-14 JP JP13463288U patent/JPH0256447U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006066721A (en) * | 2004-08-27 | 2006-03-09 | Mitsubishi Electric Corp | Semiconductor package |
JP4503398B2 (en) * | 2004-08-27 | 2010-07-14 | 三菱電機株式会社 | Semiconductor package |