JPH025552A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the disconnection of a wiring due to a step coverage failure by a method wherein a glass layer containing impurity is formed on a glass layer which contains no impurity, which is employed as an insulating layer. CONSTITUTION:When a contact hole is provided to glass layers 4 and 7 of a two- layered structure through an etching, a side wall 7a of the glass layer 7 containing impurity expands outside of aside wall 4a of the glass layer 4 which contains no impurity. Moreover, an etching is made to stop when the side wall 4a of the upper layer 7 advances, the side wall 4a of the lower layer of the glass layer 4 containing no impurity is tapered into such a state that its upper part is wider than its lower part, because the upper part is kept in contact with an etching solution for a period longer than the lower part. In result, the side wall of the contact hole composed of two layers of the glass layers 4 and 7 becomes slant as a whole, so that a step coverage is improved. Therefore, when an aluminum wiring 6 is formed on the surface of the above side wall, aluminum is formed to be uniform in thickness along the side walls 7a and 4a of the glass layers 7 and 4, and the width of a corner section of the glass layer 7 grows sufficiently large as shown by A. Therefore, the disconnection of a wiring can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device with planarized wiring.

2. Description of the Related Art In general, a glass layer containing certain impurities and having excellent cracking properties is sometimes used as an insulating film between a semiconductor substrate and wiring formed on its surface.

Hereinafter, such a conventional semiconductor device will be explained with reference to FIG. 2.

In FIG. 2, impurities are diffused into the surface of a semiconductor substrate 1 by a well-known method to form a P-type diffusion layer 2 and an N-type diffusion layer 3. Thereafter, a glass layer 4 containing a certain amount of impurities is formed over the entire surface of the semiconductor substrate 1 as an insulating film.

A contact hole 5 is then formed by etching away a portion of the glass layer 4 (in this example, the surface portion of the N-type diffusion layer 30) using a resist (not shown). Thereafter, an aluminum wiring 6 is formed on the surface of the glass layer 4 and inside the contact hole 5, and the aluminum wiring 6 and the N-type diffusion layer 3 are connected through the contact hole 5.

Problems to be Solved by the Invention However, in the above conventional configuration, the contact hole 5
When forming the glass layer 4 by etching, since the etching rate of the glass layer 4 is uniform throughout its thickness,
The side wall of the contact hole 5 after etching has a shape substantially perpendicular to the surface of the semiconductor substrate 1, as shown in FIG. 2, and the so-called step cover 1 edge is deteriorated. Therefore, when the aluminum wiring 6 is formed on the surface of the glass layer 4, a steep step is formed between the aluminum wiring on the glass layer 4 and the aluminum wiring in the contact hole 5, and a part of the aluminum wiring 6 is There is a problem in that the wire becomes thinner as shown by B in FIG. 1, and wire breakage occurs at this portion.

The present invention solves the above-mentioned conventional problems and provides a semiconductor device that can prevent wiring breakage due to defective step cover 1 joints.

Means for Solving the Problems To achieve this object, the semiconductor device of the present invention uses as an insulating film a glass layer containing impurities and a glass layer containing impurities.

Effect: With this shift, the etching rate of the impurity-containing glass layer on the surface is lower than that of the lower glass layer that does not contain impurities, so this difference in J, etching angle = 1. The side walls of the step cover can be formed obliquely, and the step cover (notch) can be improved.

Embodiment FIG. 1 shows a semiconductor device according to an embodiment of the present invention, and the same parts as in FIG. This is a glass layer containing impurities formed on the glass layer 4.

When a contact hole is formed by etching in the glass layers 4 and 7 of such a two-layer structure, the glass layer 7 containing impurities in the surface layer is better than the glass layer 4 containing no impurities in the lower layer.
Since the etching rate is higher, as shown in FIG. 1, the side wall 7a of the glass layer 7 containing impurities spreads further outward than the side wall 4a of the glass layer 4 not containing impurities. Furthermore, if etching is terminated when the side wall 7a of the upper layer has progressed to the area shown in FIG. 1, the side wall 4a of the lower layer 4 which does not contain impurities is also in contact with the etching solution for a long time, as shown in FIG. As a result, the side walls of the contact holes formed in the glass layers 4 and 7 shown in 2.
Step coverage is improved. Therefore, even when the aluminum wiring 6 is formed on the surface, aluminum is formed with a substantially uniform thickness along the side walls 7a, 4a of the glass layers 7, 4, and the width of the corner portion of the glass layer 7 is also approximately the same. 1
It becomes sufficiently wide as shown by A in the figure.

Therefore, wire breakage does not occur.

In addition, although the case where the glass layer was made into two layers was described in the said Example, each layer may be three or more layers. On the contrary, the same effect can be obtained by making the glass layer thick υ and giving it an impurity concentration distribution in the thickness direction, with a low concentration on the semiconductor substrate 1 side and a high concentration on the aluminum wiring 6 side3.
The 7th wiring, which contains many impurities in the surface layer, corrodes. ) 5 Therefore, it is desirable to set the impurity concentration to a level that does not cause corrosion of the wiring (approximately 10 mo1% or less in the case of aluminum wiring). Effects of the Invention The present invention provides a glass layer that does not contain dull substances. Since the contact hole is formed by forming a glass layer containing impurities on top and etching it, the sidewall of the contact hole can be made tapered to improve step coverage and prevent wiring breakage. .

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. 1... Semiconductor substrate, 2... P-type diffusion,
River, 3...N-type diffusion layer, 4...Glass layer containing no impurities, 6...Aluminum wiring, 7...Glass containing impurities layer. Name of agent Patent attorney Toshio Nakao and 1 other person/--1 Semiconductor substrate z-F'M, $ diffusion layer 3-N-type expansion layer 4-°-Contains impurity 4: No glass eyebrows 2-゛Aluminum material Texture 7 - Lath layer 1 containing impurities Diagram/-1 Semiconductor substrate Z-P layer 3 - N type 1 Lath layer 5 - Lath layer 5 containing impurities Contact hole 6 - Aluminum WJ Section

Claims (1)

[Claims] A glass layer is formed on the surface of the semiconductor substrate, and the glass layer is given an impurity concentration distribution such that the concentration is low on the surface side of the semiconductor substrate and high concentration on the surface layer side, and a part of the glass layer is etched away. A semiconductor device in which a contact hole is formed using a metal wire, and a metal wiring is formed on a surface of the glass layer and inside the contact hole.