JPH0250662B2 - - Google Patents
Info
- Publication number
- JPH0250662B2 JPH0250662B2 JP7040884A JP7040884A JPH0250662B2 JP H0250662 B2 JPH0250662 B2 JP H0250662B2 JP 7040884 A JP7040884 A JP 7040884A JP 7040884 A JP7040884 A JP 7040884A JP H0250662 B2 JPH0250662 B2 JP H0250662B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- circuit
- memory
- read
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/18—Time-division multiplex systems using frequency compression and subsequent expansion of the individual signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7040884A JPS60214133A (ja) | 1984-04-09 | 1984-04-09 | デ−タ変換回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7040884A JPS60214133A (ja) | 1984-04-09 | 1984-04-09 | デ−タ変換回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60214133A JPS60214133A (ja) | 1985-10-26 |
JPH0250662B2 true JPH0250662B2 (enrdf_load_html_response) | 1990-11-05 |
Family
ID=13430608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7040884A Granted JPS60214133A (ja) | 1984-04-09 | 1984-04-09 | デ−タ変換回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60214133A (enrdf_load_html_response) |
-
1984
- 1984-04-09 JP JP7040884A patent/JPS60214133A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60214133A (ja) | 1985-10-26 |
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