JPH023927A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To increase dielectric strength between cross-wirings for surge input from outside by forming a cross-wiring part of two intersecting one-layer wirings by using a diffusion conduction layer composed of two diffusion layers formed by different diffusion processes. CONSTITUTION:As to the wiring-cross part of the title semiconductor integrated circuit device, an N<+> diffusion conductor layer, which a part of the lower Al wiring 1 forms, is composed of two N<+> diffusion layers 3, 4. Thus the N<+> diffusion layer 3 just under wiring 2 is formed by a preceding process of the final diffusion process to form the emitter of a transistor TR, and the N<+> diffusion layer 4 is formed at the same time as the emitter region of the TR by the final process. Thereby an insulating film 9 between the wiring 2 and the diffusion layer 3 can be thickly formed. The part (a) of the insulating film 9 is grown after the N<+> diffusion layer 4 is formed. The part (b) has a film thickness formed as follows; the growth is begun after the N<+> diffusion layer 3 prior to the diffusion layer 4 is formed, and is continued in the same way as the part (a) after the diffusion layer 4 is formed. The insulating film on the region which is formed prior thereto is formed more thickly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to the structure of a wiring intersection in a -layer aluminum wiring semiconductor integrated circuit device.

[Conventional technology]

FIGS. 2(a), (b), and (c) are a plan view and AA' and BB' cross-sectional views, respectively, showing the structure of a wiring intersection in a conventional partially aluminum wiring semiconductor integrated circuit device. , the same first-layer aluminum wiring 2 that intersects with the aluminum wiring 1 is formed so as to pass over the buried N+ diffusion conductor layer 10 on the N-type epitaxial layer 6 formed in a part of the aluminum wiring 1 below. Ru. Here, La and lb are contacts between the aluminum wiring 1 and the N+ diffused conductor layer 10, respectively, and 5 is a P+ type for element isolation to separate the N-type epitaxial layer 6 that buries the N+ diffused conductor layer 10 into island-like regions. Diffusion area, 7 is P
− type silicon substrate, and 8.11 each indicate an insulating film.

[Problem to be solved by the invention]

However, in conventional dual semiconductor integrated circuit devices, the N+ type diffusion conductor layer 10 used at the wiring intersection is formed in the final diffusion step in the manufacturing process, similar to the emitter region of the NPN transistor (not shown) on the substrate. , this N
The insulating film 11 on the + type diffusion conductor layer 10 is formed to be the thinnest. This is because the insulating film on the diffusion region formed in each diffusion process is once removed in each diffusion process, and the growth time for the insulating film on the diffusion region formed in the later process is shortened. be. Therefore, the insulating film 11 is destroyed near the contacts la and lb as shown by the dotted line in FIG. There is a drawback that 1 and 2 are electrically shorted through the N+ type diffusion conductor layer 10.

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a semiconductor integrated circuit device that can sufficiently increase the dielectric strength of wiring intersections where -layer wirings intersect with each other.

[Means to solve the problem]

According to the present invention, there is provided a semiconductor integrated circuit device having two single-layer wirings that intersect with each other on a substrate, in which wiring intersection portions of the two intersecting single-layer wirings are formed by different diffusion processes. The diffusion conductive layer includes two diffusion layers.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

FIGS. 1(a), 1(b), and 1(c) are a plan view of a wiring intersection of a single-layer aluminum wiring semiconductor integrated circuit device showing one embodiment of the present invention, and its AA' and BB' cross sections, respectively. It is a diagram. According to this embodiment, in the wiring intersection of the semiconductor integrated circuit device of the present invention, the N++ dispersion layer formed by a part of the lower aluminum wiring 1 has two N++ dispersion layers formed by different diffusion processes.
'' comprises diffusion layers 3 and 4, i.e.
The N1 type diffusion N3 directly under the aluminum wiring 2 is formed in a step prior to the final diffusion step for forming the emitter of the transistor, and then the N1 diffusion layer 4 is formed simultaneously with the emitter region of the transistor in this final step. . Thereby, the insulating film 9 between the aluminum wiring 2 and the N+ type scattering layer 3 can be formed to be a thick film. Here, part a of the insulating film 9 is grown after the formation of the N+ type scattered layer 4, and part b is grown after the formation of the N+ type scattered layer 3 before this N+ type scattered layer 4. Even after the growth begins and the formation of the N+ type scattering layer 4, the film thickness is the same as that of part a. Therefore, the insulating film on the previously formed region is formed thicker.

〔Effect of the invention〕

As described above in detail, according to the present invention, the wiring intersections of a -layer aluminum wiring semiconductor integrated circuit device are formed by a two-tiered diffusion conductor layer consisting of two diffusion layers formed in different diffusion processes. Since a thick insulating film is provided on the diffused conductor layer, the dielectric strength between the cross wirings against external surge input can be increased, and the reliability can be significantly improved.

1.2...Aluminum wiring in one layer that intersects with each other, 1
．． a, lb... Contact, 3, 4... N+ type scattering layer 5... P+ type diffusion region for element isolation, 6... N-
type epitaxial layer, 7...P-type silicon substrate, 8
．． 9...Insulating film.

Claims (1)

[Claims] In a semiconductor integrated circuit device having two single-layer wirings that intersect with each other on a substrate, the wiring intersection portion of the two intersecting single-layer wirings is formed of a diffused conductive layer consisting of two diffusion layers formed by different diffusion processes. A semiconductor integrated circuit device characterized by: