JPH05291272A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a semiconductor whose properties have been improved and its manufacturing method by extending an emitter region in simple structure and in the same pellet size as well. CONSTITUTION:This semiconductor device provides a first conductivity type region 1 and a second conductivity type region 3 formed in this first conductivity type region. The lower part of the second conductivity type region 3 is expanded and formed into the first conductivity type region 1. The manufacturing method for this semiconductor device is based on a thin film manufacturing method. A second conductivity type region 9 is formed in a first conductivity type region 8 of a board 7. A thin film 10 which comprises a conductor whose conductivity type is equivalent to the second conductivity type region 9, is formed thereon and connected to the end of the second conductivity type region 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method.

[0002]

2. Description of the Related Art Conventionally, bipolar transistors (hereinafter, simply referred to as transistors) have been shown in FIGS.
The structure shown in 2 is used. In the figure, 5
1 is a base, 52 is a base electrode extraction part, 53 is an emitter, 54 is an emitter electrode extraction part, 55 is a collector, 56
Indicates a thin film insulating layer.

In the transistor having such a structure, since the base electrode lead-out portion 52 is formed on the base 51, the emitter region is reduced accordingly. As a result, in the same pellet size (base size), the characteristics of the transistor such as the saturation voltage characteristic level between the collector and the emitter are deteriorated, the collector current is decreased, and the ON resistance is increased. In order to solve this problem, a transistor having a multilayer wiring structure whose cross section is shown in FIG. 13 has been proposed. However, in the transistor having such a structure, the structure is complicated because the electrode layers are multi-layered. Therefore, the manufacturing process and the product cost are increased.

FIG. 14 is a sectional view of a conventional PN diode. Also in the diode configured as described above, the formation of the P-type conductive region 62, which is the second-type conductive region formed in the N-type semiconductor substrate 61, which is the first-type conductive region, is restricted in the same manner as described above. It has a problem of decrease of. In the figure, 63 is the second electrode layer and 64 is the first electrode layer.
The electrode layer, 65 is a thin film insulating layer.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems of the prior art, and has a simple structure, and as a result of expanding the emitter region in the same pellet size (base size), the characteristics It is a primary object of the present invention to provide a semiconductor device having improved characteristics and a manufacturing method thereof.

[0006]

The semiconductor device of the present invention comprises:
A semiconductor device having a first-type conductive region and a second-type conductive region formed in the first-type conductive region as constituent elements, wherein a lower portion of the second-type conductive region is the first-type conductive region. It is characterized in that it is expanded and formed in the shape of a lateral hole in the region.

In the semiconductor device of the present invention, preferably, the semiconductor device is a bipolar transistor, the first type conductive region is a base, and the second type conductive region is an emitter.

Further, in the semiconductor device of the present invention, it is preferable that the semiconductor device is a diode.

Further, in the semiconductor device of the present invention,
It is preferable that the first type conductive region is P (N) type and the second type conductive region is N (P) type.

A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device, including a step of forming a second type conductive region in a first type conductive region, wherein the second type conductive region is formed. In the step of forming, a lower portion of the second type conductive region is expanded and formed in the first type conductive region in the shape of a lateral hole.

In the method of manufacturing a semiconductor device of the present invention,
The lateral hole-like expansion formation below the second-type conductive region into the first-type conductive region has the same shape as the conductor of the first-type conductive region on the surface of the substrate having the first-type conductive region. Forming a conductive type conductor layer, and connecting the second type conductive region from the surface of the first type conductive region to an end of the second type conductive region.
Preferably, the step of forming a conductor region of the same conductivity type as the conductor of the type conductive region is performed.

In the method of manufacturing a semiconductor device of the present invention, it is preferable that the semiconductor device is a bipolar transistor, the first type conductive region is a base, and the second type conductive region is an emitter.

Further, in the method for manufacturing a semiconductor device of the present invention, it is preferable that the semiconductor device is a diode.

Moreover, in the method of manufacturing a semiconductor device of the present invention, it is preferable that the first type conductive region is P (N) type and the second type conductive region is N (P) type.

[0015]

In the semiconductor device of the present invention, since the lower part of the second type conductive region is expanded and formed into the first type conductive region, the second type conductive region is formed large even if the same pellet size is used. can do. Therefore, when a transistor is used as the semiconductor device, a large emitter area is secured within the same pellet size (base size) even if the same bonding pad as the conventional one is formed. It is possible to improve the characteristics of the transistor such as the saturation voltage characteristic level, the collector current increase, and the ON resistance decrease. Therefore, when the same electric characteristics are obtained, the base size (pellet size) can be reduced, and the element cost can be reduced.

Further, in the method of manufacturing a semiconductor device of the present invention, a conductor layer having the same conductivity type as that of the first type conductive region is formed on the base material having the first type conductive region in which the second type conductive region is formed. Then, a conductive region of the same conductivity type as the second type conductive region connected to the second type conductive region is formed in the conductive layer, and a lateral hole is formed in the first type conductive region. Since the second type conductive region having the expanded lower portion is formed, the semiconductor device of the present invention can be easily manufactured.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described based on embodiments with reference to the accompanying drawings, but the present invention is not limited to such embodiments.

FIG. 1 is an explanatory view of a surface pattern of an embodiment of a semiconductor device of the present invention, FIG. 2 is a sectional view taken along the line AA of FIG. 1, and FIG. 3 is a cross section of another embodiment of the semiconductor device of the present invention. 4 is a structural diagram, FIGS. 4 to 9 are explanatory views of a manufacturing process of an embodiment of a method of manufacturing a semiconductor device of the present invention, and FIG. 10 is a sectional view of still another embodiment of a semiconductor device of the present invention. In the figure, 1 is a base, 2 is a base electrode lead portion, 3 is an emitter, 4 is an emitter electrode lead portion, 5 is a collector, and 6 is a thin film insulating layer.
In the embodiment of the transistor shown in FIG. 2, the base 1 is the first conductive region, the emitter 3 is the second conductive region, and in the embodiment of the diode shown in FIG. 10, the N-type substrate is the first. Type conductive region and P type conductive region are second
A type conductive region is shown.

In the transistor according to one embodiment of the present invention whose plane pattern is shown in FIG. 1 and whose cross section is shown in FIG. 2, the lower region of the emitter 3 is formed in a lateral hole extending to the region of the base 1. ing. Therefore, even if the base electrode lead-out portion 2 and the emitter electrode lead-out portion 4 are formed in the same manner as in the conventional example shown in FIG. 11, a large area of the emitter 3 can be secured in the same base size (pellet size). .. Therefore, it is possible to improve the saturation voltage characteristic level between the collector and the emitter, increase the collector current, and improve the on-resistance.

In this transistor, the range of the lateral hole formed in the region of the base 1 below the emitter 3 is appropriately determined according to the required performance of the transistor.
As an example thereof, a plurality of emitter electrode lead-out portions 4 are required especially when it is necessary to increase the current capacity, so that the cross section of the base region 1 is divided into two as shown in FIG. Thus, the emitter region 3 is formed.

Since other structures are similar to those of the conventional transistor, detailed description thereof will be omitted.

Next, the manufacturing process of the transistor having the above structure will be described with reference to FIGS.

Step 1: A P-type impurity diffusion portion (P-type conductive region) 8 is formed in the N-type substrate 7. (See Figure 4)

Step 2: In the P-type impurity diffusion portion 8, a mask alignment margin in a subsequent process and an N-type impurity diffusion portion (N-type conductivity) are provided in a range in which a lateral diffusion length of the impurity is taken into consideration. Region 9) is formed. (See Figure 5)

Step 3: A P-type impurity diffusion layer 10 is formed on the surface of the N-type substrate 7. This film thickness is set to a thickness equal to or less than the diffusion depth in the next step, in consideration of the correlation with the impurity diffusion process adopted in the next step. (See Figure 6)

Step 4: From the surface of the P-type impurity diffusion layer 10, an N-type impurity diffusion section connected to the end of the N-type impurity diffusion section 9 is formed to form the emitter 3. Further, an N-type impurity diffusion portion is formed on the outer peripheral portion of the P-type impurity diffusion portion 8, and the base 1 and the collector 5 are formed. In this way, the emitter 3 whose bottom portion is expanded and formed in the shape of a horizontal hole is completed. (See Figure 7)

Step 5: A thin film insulating layer 6 having an opening at a predetermined position is formed on the N-type substrate 7 on which the base 1, the emitter 3 and the collector 5 are formed. (See FIG. 8) The thin film insulating layer 6 may be formed in step 4 during the impurity diffusion process.

Step 6: A base lead-out portion 2 which is in ohmic contact with the base 1 and an emitter lead-out portion 4 which is connected to the emitter 3 are formed in the opening, and an electrode material is formed by vapor deposition or sputtering, followed by a photolithography process. To pattern the extraction electrode. (See Figure 9)

As described above, according to the method of manufacturing a semiconductor device of the present invention, a transistor having the emitter 3 whose lower portion is expanded and formed in the shape of a lateral hole in the base 1 can be manufactured by a simple process.

FIG. 10 is a sectional view of still another embodiment of the present invention. In the diode having the PN junction shown in FIG. 10, the lower portion of the P-type conductive region 12 is extended and formed in the N-type semiconductor substrate 11 in the shape of a lateral hole. The size of this extendedly formed portion is appropriately determined in consideration of the characteristics of the diode. In the figure, 13 is a second electrode layer, 14 is a first electrode layer, and 15 is a thin film insulating layer.

In the diode thus constructed, the P-type conductive region 12 can be enlarged even if the first electrode layer 14 is formed in the same manner as the conventional one, so that the forward current characteristic is improved and the electrostatic breakdown voltage is improved. Can be improved.

[0032]

As described above, in the semiconductor device of the present invention, the lower portion of the second type conductive region formed in the first type conductive region is extended and formed in the first type conductive region in the shape of a lateral hole. Therefore, even if the same pellet size is used, the second type conductive region can be made large. Therefore, the pellet size can be reduced when the same electrical characteristics are obtained, and the element cost can be reduced.

The method of manufacturing a semiconductor device according to the present invention includes a second method of forming a second conductive film formed in a first type conductive region by using a thin film manufacturing method.
Since the lower part of the type conductive region is expanded and formed in the first type conductive region, the semiconductor device of the present invention can be manufactured by a simple process.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a surface pattern of an embodiment of a semiconductor device of the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is a sectional structural view of another embodiment of the semiconductor device of the present invention.

FIG. 4 is a part of an explanatory view of a manufacturing process of an embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 5 is a part of an explanatory view of a manufacturing process of an embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 6 is a part of an explanatory view of a manufacturing process of an embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 7 is a part of an explanatory view of the manufacturing process of the embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 8 is a part of an explanatory view of a manufacturing process of the embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 9 is a part of an explanatory view of a manufacturing process of an embodiment of the semiconductor device manufacturing method of the present invention.

FIG. 10 is a sectional view of still another embodiment of the semiconductor device of the present invention.

FIG. 11 is an explanatory diagram of a surface pattern of a conventional transistor.

12 is a sectional view taken along line BB of FIG.

FIG. 13 is a cross-sectional view of a conventional transistor having a multilayer wiring structure.

FIG. 14 is a cross-sectional view of a conventional PN junction type diode.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 base (1st type conductive area) 2 base electrode extraction part (1st electrode) 3 emitter (2nd type conductive area) 4 emitter electrode extraction part (2nd electrode) 5 collector 6 thin film insulating layer 7 N type semiconductor substrate 8 P-type impurity diffusion portion (first-type conductive region) 9 N-type impurity diffusion portion (second-type conductive region) 10 P-type impurity diffusion layer 11 N-type semiconductor substrate (first-type conductive region) 12 P-type conductive region (first 2 type conductive region) 13 second electrode 14 first electrode

Claims (2)

[Claims] 1. A semiconductor device having a first-type conductive region and a second-type conductive region formed in the first-type conductive region as constituent elements, wherein a lower portion of the second-type conductive region comprises: A semiconductor device, wherein the semiconductor device is formed so as to extend in a lateral hole shape into the first-type conductive region. 2. A method of manufacturing a semiconductor device, comprising the step of forming a second type conductive region in a first type conductive region,
In the step of forming the second-type conductive region, the second
A method of manufacturing a semiconductor device, wherein a lower part of the type conductive region is expanded and formed in a lateral hole shape into the first type conductive region.