JPH0230837Y2 - - Google Patents
Info
- Publication number
- JPH0230837Y2 JPH0230837Y2 JP1984018238U JP1823884U JPH0230837Y2 JP H0230837 Y2 JPH0230837 Y2 JP H0230837Y2 JP 1984018238 U JP1984018238 U JP 1984018238U JP 1823884 U JP1823884 U JP 1823884U JP H0230837 Y2 JPH0230837 Y2 JP H0230837Y2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- stirring
- protrusion
- solder member
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910000679 solder Inorganic materials 0.000 claims description 39
- 238000003756 stirring Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 26
- 239000004065 semiconductor Substances 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 12
- 239000003779 heat-resistant material Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 238000007747 plating Methods 0.000 description 10
- 229910052759 nickel Inorganic materials 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 230000001771 impaired effect Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910020935 Sn-Sb Inorganic materials 0.000 description 1
- 229910008757 Sn—Sb Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- GVFOJDIFWSDNOY-UHFFFAOYSA-N antimony tin Chemical compound [Sn].[Sb] GVFOJDIFWSDNOY-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
【考案の詳細な説明】
〔技術分野〕
本案は半導体装置の製造装置に関し、特に半導
体素子の基板へのマウントに先立つて、半田部材
を基板に良好になじませるための撹拌装置に関す
るものである。[Detailed Description of the Invention] [Technical Field] The present invention relates to an apparatus for manufacturing semiconductor devices, and in particular to a stirring device for blending a solder member well with a substrate prior to mounting a semiconductor element on the substrate.
一般に半導体装置は例えば第1図に示すよう
に、放熱板などの基板Aに半導体素子Bを半田部
材cを用いて固定し、この半導体素子Bの電極と
リードDとを金属細線Eにて接続し、かつ半導体
素子Bを含む主要部分を樹脂材Fにてモールド被
覆して構成されている。
Generally, in a semiconductor device, as shown in FIG. 1, a semiconductor element B is fixed to a substrate A such as a heat sink using a solder member c, and the electrodes of the semiconductor element B and leads D are connected using thin metal wires E. The main portion including the semiconductor element B is molded and covered with a resin material F.
この半導体装置において、基板Aにはその全面
にニツケルメツキ層が形成されており、さらに半
導体素子Bの固定部分のニツケルメツキ層上には
銀メツキ層が部分メツキ法によつて形成されてい
る関係で、半田部材Cは基板Aに対して良好なな
じみ性を呈する。このために、半導体素子Bは基
板Aに、特性面に悪影響を及ぼすことなく、確実
に固定することができる。 In this semiconductor device, a nickel plating layer is formed on the entire surface of the substrate A, and a silver plating layer is further formed on the nickel plating layer on the fixed portion of the semiconductor element B by a partial plating method. The solder member C exhibits good conformability to the substrate A. For this reason, the semiconductor element B can be securely fixed to the substrate A without adversely affecting the characteristics.
しかし乍ら、近時、銀などの貴金属の高謄に原
因して半導体装置もコスト高になる傾向にあるこ
とから、銀メツキ層を省略し、ニツケルメツキ層
に半導体素子Bを直接固定することが検討されて
いるものの、次のような問題もあつて充分に満足
しうる結果は得られていない。 However, in recent years, the cost of semiconductor devices has tended to increase due to the high prices of precious metals such as silver, so it is possible to omit the silver plating layer and directly fix the semiconductor element B to the nickel plating layer. Although these methods have been studied, the following problems have not resulted in fully satisfactory results.
即ち、ニツケルメツキ層は半田部材Cに対して
銀メツキ層のように良好ななじみ性が得られない
こともあつて、半導体素子Bを基板Aに固定する
に先立つて、半田部材Cを基板Aのニツケルメツ
キ層に強制的になじませる必要がある。 That is, the nickel plating layer does not have as good compatibility with the solder member C as the silver plating layer does, so before fixing the semiconductor element B to the substrate A, the solder member C is attached to the substrate A. It is necessary to forcibly adapt it to the Nickelmetsuki layer.
これには例えば特公昭57−24928号公報に開公
されているような耐熱性部材よりなる撹拌棒が用
いられ、その下端面を溶融状態の半田部材に押し
つけて回転させることにより行われるのである
が、撹拌時に半田部材の温度が低下し易く、充分
効果が得られない。 For this purpose, a stirring rod made of a heat-resistant material such as that disclosed in Japanese Patent Publication No. 57-24928 is used, and the lower end of the rod is pressed against the molten solder material and rotated. However, the temperature of the solder member tends to drop during stirring, making it impossible to obtain sufficient effects.
従つて、例えば第2図に示すように、撹拌棒G
を本体部Gaと撹拌部Gbとを中心部において連結
部Gcによつて一体化して構成することが提案さ
れているが、実際には加熱レールHに基板Aを載
置し、溶融状態の半田部材Cに撹拌棒Gbを押し
つけて回転すると、第3図に示すように、半田部
材Cの中央部に基板Aとなじみにくい部分が生じ
易く、仮に半導体素子Bを固定しても熱抵抗特性
が著しく損なわれ、実用上の問題が残る。 Therefore, for example, as shown in FIG.
It has been proposed to integrate the body part Ga and the stirring part Gb at the center by a connecting part Gc, but in reality, the board A is placed on the heating rail H and the molten solder is heated. When the stirring bar Gb is pressed against the member C and rotated, as shown in Fig. 3, a part of the solder member C that is difficult to fit in with the substrate A tends to form in the center, and even if the semiconductor element B is fixed, the thermal resistance characteristics will deteriorate. It is significantly impaired and practical problems remain.
この原因につき、検討した処、本体部Gaと撹
拌部Gbとが中心部において極く短い連結部Gcに
よつて連結されているために、撹拌時に半田部材
Cの熱が撹拌部Gb、連結部Gcを介して本体部Ga
に移動し易い上、回転中心部分では半田部材Cの
撹拌が充分に行われない結果、半田部材Cの中心
部分の基板Aに対するなじみ性が阻害されること
が明らかとなつた。 We investigated the cause of this and found that because the main body Ga and the stirring part Gb are connected at the center by an extremely short connecting part Gc, the heat of the solder member C is transferred to the stirring part Gb and the connecting part during stirring. Main body Ga through Gc
It has become clear that the compatibility of the center portion of the solder member C with the substrate A is impaired as a result of the solder member C being easily moved, and the solder member C being not sufficiently stirred at the center of rotation.
かといつて、半田部材Cの基板Aに対するなじ
み性を改善するために、撹拌棒Gの回転速度を高
めると、半田部材Cが撹拌棒Gによつて飛ばさ
れ、必要以上に拡がつてしまい、逆に半導体素子
Bの固定性が損なわれるようになり、好ましくな
い。 However, if the rotation speed of the stirring rod G is increased in order to improve the compatibility of the solder member C with the substrate A, the solder member C will be blown off by the stirring rod G and will spread more than necessary. On the contrary, the fixation of the semiconductor element B is impaired, which is not preferable.
それ故に、本案の目的は簡単な構成によつて撹
拌棒の回転速度を高めても半田部材が必要以上に
拡がらず、しかも基板とのなじみ性を有効に改善
できる半導体装置の製造装置を提供することにあ
る。
Therefore, the purpose of the present invention is to provide a semiconductor device manufacturing apparatus that has a simple configuration that prevents the solder material from spreading more than necessary even when the rotational speed of the stirring bar is increased, and that can effectively improve the compatibility with the substrate. It's about doing.
そして、本案の特徴は耐熱性部材よりなる撹拌
棒の下端面を基板に載置され、かつ溶融状態の半
田部材に押しつけて回転することにより、半田部
材を基板になじませるものにおいて、上記撹拌棒
の下端面の周縁部にリング状の突出部を形成する
と共に、突出部にて囲繞された凹部に撹拌用の羽
根を形成したことにある。 The feature of the present invention is that the lower end of the stirring rod made of a heat-resistant material is placed on the substrate and is pressed against the molten solder material and rotated to blend the solder material with the substrate. A ring-shaped protrusion is formed on the periphery of the lower end surface, and stirring blades are formed in the recess surrounded by the protrusion.
この考案によれば、半田部材は撹拌棒の突出部
にて囲繞された空間部内において羽根によつて撹
拌される関係で、撹拌棒の回転速度が早くなつて
も、半田部材が必要以上に拡がることはない。こ
のために、半導体素子を基板に対し、所要量の半
田部材にて固定することができ、充分の固定性を
確保できる。 According to this invention, the solder material is stirred by the blades within the space surrounded by the protrusion of the stirring rod, so even if the rotation speed of the stirring rod increases, the solder material will not spread more than necessary. Never. For this reason, the semiconductor element can be fixed to the substrate with a required amount of solder material, and sufficient fixation can be ensured.
又、半田部材は突出部にて囲まれた空間部内で
羽根によつて撹拌されるので、半田部材の基板に
対するなじみ性を全体的に良好ならしめることが
できる。このために、半導体素子を固定した場
合、それの熱抵抗性を改善できる。 Further, since the solder member is stirred by the blade within the space surrounded by the protrusion, the overall compatibility of the solder member with the substrate can be made good. Therefore, when a semiconductor element is fixed, its thermal resistance can be improved.
次に本案の一実施例について第4図〜第5図を
参照して説明する。
Next, an embodiment of the present invention will be described with reference to FIGS. 4 and 5.
図において、1は加熱レールであつて、その上
方には撹拌装置2が配設されている。この撹拌装
置2は例えばモータなどの駆動系より延びるワイ
ヤ3と、このワイヤ3の端部に固定された有底筒
状の支持部材4と、支持部材4に上端を挿入して
固定された撹拌棒5とから構成されている。この
撹拌棒5は例えばセラミツクにて構成されてお
り、その下端面の周縁部分にはリング状の突出部
6が形成されている。そして、突出部6にて囲繞
された凹部7には複数の円弧状の羽根8が形成さ
れている。特に、突出部6と羽根8の下端面はほ
ぼ同一面となるように形成されているが、羽根8
の下端面を突出部6の下端面より低くすることも
できる。 In the figure, 1 is a heating rail, above which a stirring device 2 is disposed. This stirring device 2 includes a wire 3 extending from a drive system such as a motor, a bottomed cylindrical support member 4 fixed to the end of the wire 3, and a stirring device fixed by inserting the upper end into the support member 4. It consists of a rod 5. The stirring rod 5 is made of ceramic, for example, and has a ring-shaped protrusion 6 formed at the peripheral edge of its lower end surface. A plurality of arc-shaped blades 8 are formed in the recess 7 surrounded by the protrusion 6. In particular, the protrusion 6 and the lower end surfaces of the blades 8 are formed to be approximately on the same plane, but the blades 8
The lower end surface of the protrusion 6 can also be made lower than the lower end surface of the protrusion 6.
次に、半田部材の撹拌方法について第6図を参
照して説明する。まず、加熱レール1に銅の全面
にニツケルメツキ層を形成してなる基板Aを載置
すると共に、基板Aの半導体素子の固定予定部分
に錫−アンチモン(Sn−Sb)系の半田部材Cを
供給する。そして、基板Aは一定方向に間歇的に
移送され、その間に半田部材Cは溶融状態にな
る。基板Aが所定のポジシヨンに移送され、停止
すると、撹拌装置2が2〜3回/秒程度の回転速
度にて回転し乍ら下降し、突出部6で囲まれた空
間部に半田部材Cを収納する。この状態で、空間
部(凹部)7に位置する半田部材Cは複数の羽根
8によつて強制的に回転させられる。これによつ
て、半田部材Cは基板Aのニツケルメツキ層にな
じむ。 Next, a method of stirring the solder member will be explained with reference to FIG. 6. First, a substrate A made of copper with a nickel plating layer formed on the entire surface is placed on the heating rail 1, and a tin-antimony (Sn-Sb) based solder material C is supplied to the portion of the substrate A where the semiconductor element is to be fixed. do. Then, the substrate A is intermittently transferred in a fixed direction, and during this time the solder member C becomes molten. When the substrate A is moved to a predetermined position and stopped, the stirring device 2 rotates at a rotation speed of about 2 to 3 times per second and descends, placing the solder member C in the space surrounded by the protrusion 6. Store it. In this state, the solder member C located in the space (recess) 7 is forcibly rotated by the plurality of blades 8. As a result, the solder member C adapts to the nickel plating layer of the substrate A.
このように半田部材Cは撹拌棒5の突出部6に
よつて囲まれた空間部に抱持した状態で撹拌され
るので、半田部材Cが必要以上に拡がることを防
止でき、半導体素子の基板への固定性を改善でき
る。 Since the solder member C is stirred while being held in the space surrounded by the protrusion 6 of the stirring rod 5, it is possible to prevent the solder member C from spreading more than necessary, and it is possible to prevent the solder member C from spreading more than necessary. can improve fixation.
しかも、半田部材Cは空間部7にて羽根8によ
つて強制的に撹拌されるので、基板Aに対するな
じみ性を全体に亘つて良好ならしめることができ
る。このために、半導体素子を固定した場合、熱
抵抗特性の劣化を防止できる。 Furthermore, since the solder member C is forcibly stirred by the blades 8 in the space 7, the compatibility with the substrate A can be made good throughout. Therefore, when the semiconductor element is fixed, deterioration of thermal resistance characteristics can be prevented.
第1図は半導体装置の側断面図、第2図は半田
部材の撹拌方法を説明するための一部断面図、第
3図は半田部材の基板へのなじみ状態を示す平面
図、第4図は本案の一実施例を示す側断面図、第
5図は第4図の下面図、第6図は半田部材の撹拌
方法を説明するための一部断面図である。
図中、Aは基板、Cは半田部材、2は撹拌装
置、5は撹拌棒、6は突出部、7は凹部(空間
部)、8は羽根である。
FIG. 1 is a side sectional view of the semiconductor device, FIG. 2 is a partial sectional view for explaining the method of stirring the solder material, FIG. 3 is a plan view showing how the solder material is adapted to the substrate, and FIG. 4 5 is a side sectional view showing an embodiment of the present invention, FIG. 5 is a bottom view of FIG. 4, and FIG. 6 is a partial sectional view for explaining a method of stirring a solder member. In the figure, A is a substrate, C is a solder member, 2 is a stirring device, 5 is a stirring rod, 6 is a protrusion, 7 is a recess (space), and 8 is a blade.
Claims (1)
置され、かつ溶融状態の半田部材に押しつけて回
転することにより、半田部材を基板になじませる
ものにおいて、上記撹拌棒の下端面の周縁部にリ
ング状の突出部を形成すると共に、突出部にて囲
繞された凹部に撹拌用の羽根を形成したことを特
徴とする半導体装置の製造装置。 The lower end surface of the stirring rod made of a heat-resistant material is placed on the substrate and rotates while pressing against the molten solder material to blend the solder member onto the substrate, the peripheral edge of the lower end surface of the stirring rod being rotated. 1. An apparatus for manufacturing a semiconductor device, characterized in that a ring-shaped protrusion is formed in the protrusion, and a stirring blade is formed in a recess surrounded by the protrusion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1823884U JPS60130640U (en) | 1984-02-09 | 1984-02-09 | Semiconductor device manufacturing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1823884U JPS60130640U (en) | 1984-02-09 | 1984-02-09 | Semiconductor device manufacturing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60130640U JPS60130640U (en) | 1985-09-02 |
JPH0230837Y2 true JPH0230837Y2 (en) | 1990-08-20 |
Family
ID=30506682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1823884U Granted JPS60130640U (en) | 1984-02-09 | 1984-02-09 | Semiconductor device manufacturing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60130640U (en) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58127644U (en) * | 1982-02-23 | 1983-08-30 | 日本電気ホームエレクトロニクス株式会社 | semiconductor manufacturing equipment |
-
1984
- 1984-02-09 JP JP1823884U patent/JPS60130640U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60130640U (en) | 1985-09-02 |
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