JPS6244545Y2 - - Google Patents

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Publication number
JPS6244545Y2
JPS6244545Y2 JP1980051468U JP5146880U JPS6244545Y2 JP S6244545 Y2 JPS6244545 Y2 JP S6244545Y2 JP 1980051468 U JP1980051468 U JP 1980051468U JP 5146880 U JP5146880 U JP 5146880U JP S6244545 Y2 JPS6244545 Y2 JP S6244545Y2
Authority
JP
Japan
Prior art keywords
lead
aluminum
thin metal
lead frame
pellet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1980051468U
Other languages
Japanese (ja)
Other versions
JPS56154062U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1980051468U priority Critical patent/JPS6244545Y2/ja
Publication of JPS56154062U publication Critical patent/JPS56154062U/ja
Application granted granted Critical
Publication of JPS6244545Y2 publication Critical patent/JPS6244545Y2/ja
Expired legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【考案の詳細な説明】 本考案はリニアICやモールドトランジスタ等
の半導体装置に関するものである。[Detailed Description of the Invention] The present invention relates to semiconductor devices such as linear ICs and molded transistors.

上記半導体装置は１枚のリードフレームの複数
箇所に半導体ペレツト（以下単にペレツトと称
す）をマウントし、このペレツトの各電極とペレ
ツト周辺に配置した複数の対応するリード部とを
金線やアルミニウム線の金属細線で接続してか
ら、要部を樹脂モールドして、複数個が一括して
製造されている。例えば、ICの従来例を第１図
及び第２図に示すと、１はリードフレーム、２は
ペレツト、３は金属細線である。リードフレーム
１はペレツト２を半田付け（マウント）する複数
のペレツト取付部１ａと、ペレツト取付部１ａの
周辺に複数のリード４を配置した複数のリード部
１ｂと、ペレツト取付部１ａとリード部１ｂとを
一体に連結する連結部１ｃとを有する。又、この
リードフレーム１は導電性や熱放散性の良い銅板
を打抜き成形し、その表面にペレツトマウント性
を良好ならしめるためニツケルや銀等をメツキし
たものが使用されている。そして、ペレツト２を
ペレツト取付部１ａ上に半田５で接着固定し、更
にペレツト２の上面電極とリード部１ｂの各リー
ド４の先端部とを金属細線３でステツチボンデイ
ングなどによつて接続してから、図示鎖線部分を
樹脂６でモールドしている。 In the above semiconductor device, semiconductor pellets (hereinafter simply referred to as pellets) are mounted at multiple locations on a single lead frame, and each electrode of the pellet is connected to a plurality of corresponding lead portions arranged around the pellet using gold wire or aluminum wire. After connecting them with thin metal wires, the main parts are molded in resin, and multiple pieces are manufactured at once. For example, when conventional examples of IC are shown in FIGS. 1 and 2, 1 is a lead frame, 2 is a pellet, and 3 is a thin metal wire. The lead frame 1 includes a plurality of pellet mounting parts 1a to which pellets 2 are soldered (mounted), a plurality of lead parts 1b having a plurality of leads 4 arranged around the pellet mounting parts 1a, and pellet mounting parts 1a and lead parts 1b. and a connecting portion 1c that integrally connects the two. The lead frame 1 is formed by punching and forming a copper plate with good conductivity and heat dissipation, and the surface thereof is plated with nickel, silver, etc. to improve pellet mounting properties. Then, the pellet 2 is adhesively fixed on the pellet mounting part 1a with solder 5, and the upper surface electrode of the pellet 2 and the tip of each lead 4 of the lead part 1b are connected with a thin metal wire 3 by stitch bonding or the like. After that, the illustrated chain line portion is molded with resin 6.

上記金属細線３には金線とアルミニウム線の両
者が使用されている。後者アルミニウム線は銅の
リードフレーム１のリード４に超音波ボンデイン
グで安定に接続固定することが難しく、そのた
め、アルミニウム線の場合は溶接している。とこ
ろで、このアルミニウム線の溶接は、まず一端を
ペレツト２の上面にアルミニウム蒸着によつて形
成した電極に超音波ボンデイングで接続固定し
て、他端をリード４の先端部上方に保持してお
き、後でこのアルミニウム線の他端とリード４の
先端部とを適当な溶接電極で挟持して両者を溶接
している。ところが、トランジスタのようにリー
ド４の数が２〜３本の場合はいいが、ICのよう
にリード４の数が十数本と多くなると、アルミニ
ウムの金属細線３の溶接が非常に困難で、事実上
は不可能に近い。従つて、ICのような場合は銅
のリードフレーム１に例えば熱圧着ボンデイング
が容易で確実な金線を金属細線３に使用してい
た。しかし、金線は高価であり、これを数十本も
使用するとなると製品の価格に占める割合が高く
なり、製品を高価ならしめる問題があつた。 Both a gold wire and an aluminum wire are used for the thin metal wire 3. It is difficult to stably connect and fix the latter aluminum wire to the lead 4 of the copper lead frame 1 by ultrasonic bonding, so in the case of the aluminum wire, it is welded. By the way, to weld this aluminum wire, first, one end is connected and fixed by ultrasonic bonding to an electrode formed on the upper surface of the pellet 2 by aluminum vapor deposition, and the other end is held above the tip of the lead 4. Later, the other end of the aluminum wire and the tip of the lead 4 are held between suitable welding electrodes and welded together. However, it is fine when the number of leads 4 is 2 to 3, such as in a transistor, but when the number of leads 4 is as large as 10 or more, as in an IC, welding the thin aluminum metal wire 3 becomes extremely difficult. In fact, it's close to impossible. Therefore, in the case of an IC, for example, gold wire, which can be easily and reliably bonded by thermocompression, is used for the thin metal wire 3 in the copper lead frame 1. However, gold wire is expensive, and when dozens of gold wires are used, they account for a high proportion of the product price, making the product expensive.

本考案は上記従来の問題点に鑑み、これを改良
除去したもので、リードフレームと金属細線を共
にアルミニウムで形成し、リードフレームの金属
細線接続箇所を除く表面に後述のカツパーライズ
加工した半導体装置を提供する。例えば、第１図
及び第２図に示したタイプの半導体装置に本考案
を適用した例を第３図及び第４図に示すと、７は
ベース地金がアルミニウムのリードフレーム、３
はペレツト、９はアルミニウム線の金属細線、１
０は半田である。 In view of the above-mentioned conventional problems, the present invention has been developed to improve and eliminate them.The lead frame and thin metal wires are both made of aluminum, and the surface of the lead frame except for the connection portions of the thin metal wires is processed with cut-pallization as described below. provide. For example, an example in which the present invention is applied to the type of semiconductor device shown in FIGS. 1 and 2 is shown in FIGS. 3 and 4, where 7 is a lead frame whose base metal is aluminum;
is pellet, 9 is aluminum thin metal wire, 1
0 is solder.

上記リードフレーム７はペレツト取付部７ａと
リード部７ｂを連結部７ｃで一体に連結した形状
を有し、リード部７ｂの各リード１１の先端部上
面に金属細線９の一端が接続固定される。このリ
ードフレーム７の特徴は地金がアルミニウムであ
ると共に、各リード１１の先端部上面である金属
細線接続部７ｄを除く表面に銅酸化物の粉末を焼
結した（カツパーライズ加工した）焼結体層１２
を被着形成し、金属細線接続部７ｄはアルミニウ
ムの地金を露出させて、ここにアルミニウム線の
金属細線９の超音波ボンデイングを可能ならしめ
た点にある。このようにするとリードフレーム７
そのものは銅地肌で、従来の銅のリードフレーム
と同等に取扱える。 The lead frame 7 has a shape in which a pellet attachment part 7a and a lead part 7b are integrally connected by a connecting part 7c, and one end of a thin metal wire 9 is connected and fixed to the top surface of the tip of each lead 11 of the lead part 7b. The feature of this lead frame 7 is that the base metal is aluminum, and it is a sintered body with copper oxide powder sintered (cut pearlized) on the surface except for the thin metal wire connection part 7d which is the upper surface of the tip of each lead 11. layer 12
The thin metal wire connecting portion 7d is formed by exposing the aluminum bare metal to enable ultrasonic bonding of the thin metal wire 9 of the aluminum wire. In this way, lead frame 7
It has a copper base and can be handled in the same way as a conventional copper lead frame.

次に上記リードフレーム７の焼結体層１２の形
成要領を説明すると、まず第５図に示すように、
アルミニウムの平板１３の上面に前記金属細線接
続部７ｄを覆うマスク１４を取付ける。次にこの
平板１３の表裏両面にカツパーライズ加工して、
適当な厚さで焼結体層１２を形成してから、マス
ク１４を取外す。すると第６図に示すように平板
１３の金属細線接続部７ｄを除く全面に焼結体層
１２が形成される。次に平板１３を所定形状に打
抜き加工すれば上記リードフレーム７が形成され
る（第７図参照）。尚、リードフレーム７の打抜
かれたカツト面はアルミニウムの地金が露出する
が、この部分は半田付け等の処理に用いないので
アルミニウムの地金が露出しても問題はない。
又、このカツト面も焼結体層１２を被着形成する
必要があれば平板１３を先に打抜き加工してから
カツパーライズ加工すればよい。 Next, the procedure for forming the sintered body layer 12 of the lead frame 7 will be explained. First, as shown in FIG.
A mask 14 is attached to the upper surface of the aluminum flat plate 13 to cover the thin metal wire connection portion 7d. Next, cut pearlize processing is performed on both the front and back sides of this flat plate 13,
After forming the sintered body layer 12 to an appropriate thickness, the mask 14 is removed. Then, as shown in FIG. 6, a sintered body layer 12 is formed on the entire surface of the flat plate 13 except for the thin metal wire connecting portion 7d. Next, the flat plate 13 is punched into a predetermined shape to form the lead frame 7 (see FIG. 7). Note that the aluminum base metal is exposed on the punched cut surface of the lead frame 7, but since this part is not used for soldering or other processing, there is no problem even if the aluminum base metal is exposed.
Further, if it is necessary to form a sintered body layer 12 on this cut surface, the flat plate 13 may be punched out first and then cut and parized.

このように、焼結体層１２を被着形成したリー
ドフレーム７に対し、ペレツト８はパレツト取付
部７ａ上に半田１０で固着する。この場合、ペレ
ツト８は銅の焼結体層１２上に半田付けされるか
ら、より半田付け性を良好ならしめるために、ペ
レツト取付部７ａ上の焼結体層１２上に予めニツ
ケルや錫等をメツキしておくことが望ましい。次
にアルミニウム線の金属細線９の取付けはペレツ
ト８の電極や、リード１１の金属細線接続部７ｄ
の地金が全てアルミニウムのため、超音波ボンデ
イングで行う。この超音波ボンデイングは金線の
場合と同じようにステツチボンデイング法で行え
ばよい。 In this way, the pellets 8 are fixed with the solder 10 onto the pallet mounting portions 7a of the lead frame 7 on which the sintered body layer 12 is adhered. In this case, since the pellet 8 is soldered onto the copper sintered layer 12, in order to improve the solderability, nickel, tin, etc. It is preferable to mark it. Next, the thin metal wire 9 made of aluminum wire is attached to the electrode of the pellet 8 and the thin metal wire connection part 7d of the lead 11.
Because all of the base metal is aluminum, ultrasonic bonding is used. This ultrasonic bonding may be performed using the stitch bonding method as in the case of gold wire.

尚、リードフレーム７の焼結体層１２の形成
時、リードフレーム７との間にアルミニウムと銅
の合金層が0.5μ程度の厚さででき、焼結体層１
２の厚さが２〜３μ程度と薄くなることがある。
このように焼結体層１２の厚さが薄いと、その上
に半田を接着すると焼結体層１２の銅成分が半田
に拡散して焼結体層１２にアルミニウムの地金が
露出したりする恐れがあるため、このような場合
は焼結体層１２の上に銅メツキ（約10μ程度）す
れば問題はない。 In addition, when forming the sintered body layer 12 of the lead frame 7, an alloy layer of aluminum and copper with a thickness of about 0.5μ is formed between the lead frame 7 and the sintered body layer 1.
2 may be as thin as about 2 to 3 μm.
If the thickness of the sintered body layer 12 is thin in this way, when solder is bonded on top of it, the copper component of the sintered body layer 12 will diffuse into the solder, and the aluminum base metal will be exposed on the sintered body layer 12. In such a case, there is no problem if the sintered body layer 12 is plated with copper (approximately 10 μm thick).

又、上記説明はリードフレーム７をペレツト取
付部７ａとリード部７ｂを同一平面上で一体化し
たものについて行つたが、他に、例えばペレツト
の放熱性を良くするためにペレツト取付部をリー
ド部と別個な放熱板で形成し、この放熱板とリー
ド部とをかしめ等で一体化したリードフレームで
あつてもよい。尚、この場合の放熱板は従来同様
に銅板を使用してもよい。又、本考案はICに限
らずトランジスタ等の他の半導体装置に十分適用
し得るものである。 In addition, although the above explanation has been made regarding the lead frame 7 in which the pellet attachment part 7a and the lead part 7b are integrated on the same plane, it is also possible to combine the pellet attachment part with the lead part in order to improve the heat dissipation of the pellets. The lead frame may be formed by a separate heat sink, and the heat sink and the lead portion are integrated by caulking or the like. Incidentally, the heat sink in this case may be a copper plate as in the conventional case. Furthermore, the present invention is applicable not only to ICs but also to other semiconductor devices such as transistors.

以上説明したように、本考案によればペレツト
とリードの接続をアルミニウム線の超音波ボンデ
イングで行えるから、高価な金線を使用する必要
がなくなり、材料費のコストダウンが可能にな
る。又、リード部の金属細線接続部以外は銅の焼
結体層による銅地肌であるため、従来のリードフ
レームと同様に表面にメツキしたり、半田付けす
ることが可能であり、従来の製造装置がそのまま
使用できる。 As explained above, according to the present invention, since the pellet and the lead can be connected by ultrasonic bonding of aluminum wire, there is no need to use expensive gold wire, and material costs can be reduced. In addition, since the copper surface is made of a sintered copper layer except for the thin metal wire connection part of the lead part, it is possible to plate or solder the surface like a conventional lead frame, and it can be done using conventional manufacturing equipment. can be used as is.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の半導体装置の一例を示す一部平
面図、第２図は第１図Ａ−Ａ線の一部の拡大断面
図、第３図は本考案による半導体装置の実施例を
示す一部平面図、第４図は第３図Ｂ−Ｂ線の拡大
断面図、第５図乃至第７図は本考案で用いるリー
ドフレームの形成要領を説明する各工程での一部
断面図である。 ７……リードフレーム、７ｄ……金属細線接続
部、８……半導体ペレツト、９……金属細線、１
１……リード、１２……焼結体層。 FIG. 1 is a partial plan view showing an example of a conventional semiconductor device, FIG. 2 is a partially enlarged sectional view taken along line A-A in FIG. A partial plan view, FIG. 4 is an enlarged sectional view taken along the line B-B in FIG. be. 7...Lead frame, 7d...Metal thin wire connection portion, 8...Semiconductor pellet, 9...Metal thin wire, 1
1...Lead, 12...Sintered body layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リード部と半導体ペレツトの電極とを金属細線
で接続した半導体装置であつて、リード部と金属
細線をアルミニウムで形成し、リード部の金属細
線接続部を除く表面に銅酸化物粉末の焼結体層を
被着形成したことを特徴とする半導体装置。 A semiconductor device in which a lead part and an electrode of a semiconductor pellet are connected by a thin metal wire, the lead part and the thin metal wire are made of aluminum, and a sintered body of copper oxide powder is formed on the surface of the lead part except for the connection part of the thin metal wire. A semiconductor device characterized by having a layer deposited thereon.
JP1980051468U 1980-04-14 1980-04-14 Expired JPS6244545Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1980051468U JPS6244545Y2 (en) 1980-04-14 1980-04-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980051468U JPS6244545Y2 (en) 1980-04-14 1980-04-14

Publications (2)

Publication Number Publication Date
JPS56154062U JPS56154062U (en) 1981-11-18
JPS6244545Y2 true JPS6244545Y2 (en) 1987-11-25

Family

ID=29646379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980051468U Expired JPS6244545Y2 (en) 1980-04-14 1980-04-14

Country Status (1)

Country Link
JP (1) JPS6244545Y2 (en)

Also Published As

Publication number Publication date
JPS56154062U (en) 1981-11-18

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