JPH0230173B2 - - Google Patents

Info

Publication number
JPH0230173B2
JPH0230173B2 JP61116652A JP11665286A JPH0230173B2 JP H0230173 B2 JPH0230173 B2 JP H0230173B2 JP 61116652 A JP61116652 A JP 61116652A JP 11665286 A JP11665286 A JP 11665286A JP H0230173 B2 JPH0230173 B2 JP H0230173B2
Authority
JP
Japan
Prior art keywords
conductive film
pattern
layer
patterns
vernier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61116652A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62273724A (ja
Inventor
Hidemi Ishiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP61116652A priority Critical patent/JPS62273724A/ja
Publication of JPS62273724A publication Critical patent/JPS62273724A/ja
Publication of JPH0230173B2 publication Critical patent/JPH0230173B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP61116652A 1986-05-21 1986-05-21 マスク合わせ精度評価用バ−ニアパタ−ン Granted JPS62273724A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61116652A JPS62273724A (ja) 1986-05-21 1986-05-21 マスク合わせ精度評価用バ−ニアパタ−ン

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61116652A JPS62273724A (ja) 1986-05-21 1986-05-21 マスク合わせ精度評価用バ−ニアパタ−ン

Publications (2)

Publication Number Publication Date
JPS62273724A JPS62273724A (ja) 1987-11-27
JPH0230173B2 true JPH0230173B2 (zh) 1990-07-04

Family

ID=14692533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61116652A Granted JPS62273724A (ja) 1986-05-21 1986-05-21 マスク合わせ精度評価用バ−ニアパタ−ン

Country Status (1)

Country Link
JP (1) JPS62273724A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2666859B2 (ja) * 1988-11-25 1997-10-22 日本電気株式会社 目合せ用バーニヤパターンを備えた半導体装置
JP2790416B2 (ja) * 1993-08-26 1998-08-27 沖電気工業株式会社 アライメントマーク配置方法
CN106981435B (zh) * 2016-01-15 2019-12-03 无锡华润上华科技有限公司 一种光刻检查图形结构

Also Published As

Publication number Publication date
JPS62273724A (ja) 1987-11-27

Similar Documents

Publication Publication Date Title
US4516071A (en) Split-cross-bridge resistor for testing for proper fabrication of integrated circuits
US4386459A (en) Electrical measurement of level-to-level misalignment in integrated circuits
US3808527A (en) Alignment determining system
US4571538A (en) Mask alignment measurement structure for semiconductor fabrication
US4529314A (en) Method of measuring misalignment between levels on a substrate
KR100273317B1 (ko) 반도체 소자 제조 공정에서 미스얼라이먼트 측정을 위한 테스트패턴의 구조와 그 측정방법
KR100490277B1 (ko) 얼라인먼트에러측정방법및얼라인먼트에러측정패턴
CN115274482A (zh) 半导体结构及测量方法
US5543633A (en) Process and structure for measuring the planarity degree of a dielectric layer in an integrated circuit and integrated circuit including means for performing said process
CN112259527A (zh) 晶圆的测试结构
JPH0230173B2 (zh)
US6623996B2 (en) Method of measuring contact alignment in a semiconductor device including an integrated circuit
US6218847B1 (en) Test pattern for use in measuring thickness of insulating layer and method for using the same
JPS622458B2 (zh)
CN214068725U (zh) 晶圆的测试结构
JP2587614B2 (ja) 半導体装置
JPH0432216A (ja) 重ね合わせ精度及び寸法精度の評価方法
CN213958950U (zh) 晶圆的测试结构
JP3818903B2 (ja) 半導体装置のアライメント誤差の測定用素子
JPS6353942A (ja) マスクパタ−ンの合せずれ測定方法
JP3712496B2 (ja) 半導体装置の接続孔の抵抗値モニタパターン
JPH10335229A (ja) マスクの合わせずれ評価用テストパターン
JP2001291754A (ja) 導電性プラグ抵抗測定用パターンを有する半導体素子およびプロセス評価方法
JPH0435907B2 (zh)
JP2839469B2 (ja) マスク合わせずれ測定用パターン及びその測定方法

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees