JPH0228925A - Manufacture of wafer - Google Patents
Manufacture of waferInfo
- Publication number
- JPH0228925A JPH0228925A JP63180010A JP18001088A JPH0228925A JP H0228925 A JPH0228925 A JP H0228925A JP 63180010 A JP63180010 A JP 63180010A JP 18001088 A JP18001088 A JP 18001088A JP H0228925 A JPH0228925 A JP H0228925A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- silicon layer
- stopper
- thickness
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 57
- 239000010703 silicon Substances 0.000 claims abstract description 57
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 54
- 238000005498 polishing Methods 0.000 claims abstract description 29
- 239000012670 alkaline solution Substances 0.000 claims abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 7
- 239000010453 quartz Substances 0.000 claims description 5
- 239000010419 fine particle Substances 0.000 abstract description 5
- 239000003795 chemical substances by application Substances 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000010030 laminating Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 25
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 239000004744 fabric Substances 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 150000003376 silicon Chemical class 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- -1 SiC Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010303 mechanochemical reaction Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229920006305 unsaturated polyester Polymers 0.000 description 1
Landscapes
- Weting (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【発明の詳細な説明】
「産業上の利用分野」
この発明は、基板上に、単結晶、多結晶又は非晶質シリ
コンからなる層を、所望の厚さでかつ無歪鏡面な状態で
形成するためのウェーハの製造方法に関する。Detailed Description of the Invention "Industrial Application Field" This invention is directed to the formation of a layer made of single crystal, polycrystalline or amorphous silicon on a substrate to a desired thickness and in a mirror-like state without distortion. The present invention relates to a method for manufacturing a wafer.
「従来の技術およびその課題」
従来、基板上に前述シリコン層を、精密に厚さを制御し
つつ無歪鏡面な状轢で形成するのに好適な方法は知られ
ておらず、したがって基板上に所望の厚さのシリコン層
を形成するのは困難であった。"Prior art and its problems" Conventionally, there has been no known method suitable for forming the silicon layer on a substrate in a mirror-like state without distortion while precisely controlling the thickness. It was difficult to form a silicon layer of desired thickness.
例えば、従来より知られているシリコンウェーハのメカ
ノケミカル研磨方法を用いて基板上に所定厚さのシリコ
ン層を形成する場合を第１！図ないし第１３図を基に説
明する。まず、単結晶シリコンや多結晶シリコンからな
る基板ｌの表面にＳｉＯｘからなる絶縁部分２を形成し
、続いて気相成長法などの薄膜形成手段を用い、基板Ｉ
上に単結晶、多結晶あるいは非晶質シリコンからなる層
３を積層形成し、第１１図に示すシリコン積層基板を形
成する。そしてこのシリコン積層基板のシリコン層３を
、第１２図に示すように所定の厚さのシリコン層３を残
すように従来の研磨方法を用いて研磨する。この従来法
による研磨では、不飽和ポリエステル等の繊維からなる
クロスが均一に接着された金属製の定盤を回転させ、こ
のクロス上に ＳｉＯ＊微粒子を分散させたアルカリ溶
液を滴下しつつ、クロスに基板ｌを圧着、摩擦させてシ
リコン層３をメカノケミカル研磨する。For example, in the first example, a silicon layer of a predetermined thickness is formed on a substrate using a conventionally known mechanochemical polishing method for silicon wafers. This will be explained based on FIGS. 13 to 13. First, an insulating portion 2 made of SiOx is formed on the surface of a substrate l made of single crystal silicon or polycrystalline silicon, and then a thin film forming method such as a vapor phase growth method is used to form a substrate I.
A layer 3 made of single crystal, polycrystalline or amorphous silicon is laminated thereon to form a silicon laminated substrate shown in FIG. 11. The silicon layer 3 of this silicon laminated substrate is then polished using a conventional polishing method so that the silicon layer 3 of a predetermined thickness remains as shown in FIG. In this conventional polishing method, a metal surface plate to which a cloth made of fibers such as unsaturated polyester is evenly bonded is rotated, and an alkaline solution containing SiO* fine particles dispersed is dripped onto the cloth. The silicon layer 3 is mechanochemically polished by pressing the substrate 1 onto it and applying friction.
しかしながら、この従来の研磨法では、研磨され難い絶
縁部分２の位置において、クロスが圧縮変形を起こして
絶縁部分２間のシリコン層２をえぐり取るように研磨が
なされ、第１３図に示す研磨取代４の部分が研磨除去さ
れてしまうために、得られる研磨ウェーハ５のソリコン
層３の厚さにばらつきを生じてしまう問題があった。However, in this conventional polishing method, the cloth is compressively deformed at the position of the insulating part 2 that is difficult to polish, and polishing is performed so as to gouge out the silicon layer 2 between the insulating parts 2, and the polishing removal amount shown in FIG. Since the portion 4 is removed by polishing, there is a problem in that the thickness of the soric layer 3 of the resulting polished wafer 5 varies.
本発明は上記事情に鑑みてなされたもので、基板上に単
結晶、多結晶あるいは非晶質シリコンからなる層を、所
望の厚さでかつ無歪鏡面な状態で形成することのできる
ウェーハの製造方法の提供を目的としている。The present invention has been made in view of the above circumstances, and provides a wafer that can form a layer made of single crystal, polycrystalline or amorphous silicon on a substrate to a desired thickness and in a mirror-like state without distortion. The purpose is to provide a manufacturing method.
「課題を解決するための手段」
上記目的達成のために、本発明は、平坦な基板の表面に
、シリコンよりもメカノケミカル研磨され難い材料から
なるストッパーを形成し、次いで該ストッパーが形成さ
れた基板の表面に、少なくとも該ストッパーの厚さ以上
の厚さの単結晶、多結晶または非晶質シリコンからなる
層を積層形成し、次いで、表面が平滑な定盤を回転せし
め、その表面に、高純度石英の微粒子からなる研磨剤が
分散されたアルカリ溶液を供給し、該定盤の表面に平行
に配置された平坦な支持台に上記基板を固定して該定盤
の表面にシリコン層を圧着し、摩擦せしめて無歪鏡面研
磨するものである。"Means for Solving the Problem" In order to achieve the above object, the present invention forms a stopper made of a material that is less susceptible to mechanochemical polishing than silicon on the surface of a flat substrate, and then the stopper is formed. A layer made of single crystal, polycrystalline or amorphous silicon having a thickness at least equal to or greater than the thickness of the stopper is laminated on the surface of the substrate, and then a surface plate with a smooth surface is rotated, and on the surface, An alkaline solution in which an abrasive made of fine particles of high-purity quartz is dispersed is supplied, and the substrate is fixed on a flat support placed parallel to the surface of the surface plate to form a silicon layer on the surface of the surface plate. It is crimped, rubbed and polished to a distortion-free mirror surface.
「作用 」
基板の表面にストッパーとシリコン層を積層形成した後
、表面が平滑な定盤を回転せしめ、その表面に、高純度
石英の微粒子からなる研磨剤が分散されたアルカリ溶液
を供給し、該定盤の表面に平行に配置された平坦な支持
台に上記基板を固定して該定盤の表面にシリコン層を圧
着し、摩擦せしめて研磨することにより、ストッパーの
厚さと等しい厚さのシリコン層を無歪の状態で残すこと
ができ、基板上に無歪鏡面のシリコン層を所望の厚さで
形成することができる。``Operation'' After forming a stopper and a silicon layer on the surface of the substrate, a surface plate with a smooth surface is rotated, and an alkaline solution in which an abrasive made of fine particles of high-purity quartz is dispersed is supplied to the surface. The substrate is fixed to a flat support placed parallel to the surface of the surface plate, and a silicon layer is pressed onto the surface of the surface plate, rubbed and polished to form a layer with a thickness equal to that of the stopper. The silicon layer can be left in a strain-free state, and a strain-free mirror silicon layer can be formed to a desired thickness on the substrate.
「実施例」
第１図ないし第４図は本発明のウェーハの製造方法の一
実施例を説明するためのものである。この例では、まず
基板１１の表面に、形成すべきシリコン層の厚さと同一
の厚さを有するストッパー１２および必要によって絶縁
部分２を形成する。Embodiment FIGS. 1 to 4 are for explaining an embodiment of the wafer manufacturing method of the present invention. In this example, first, on the surface of the substrate 11, a stopper 12 having the same thickness as the silicon layer to be formed and an insulating portion 2 are formed if necessary.
この基板Ｉｔとしては、少なくとも表面部分が単結晶シ
リコン、多結晶シリコンまたは高純度石英からなるもの
が使用される。また上記ストッパー１２の材料としては
、Ｓｉｎ、などの酸化物、ＳｉＣなどの炭化物、５ｉｓ
Ｎｔなどの窒化物などのシリコン（Ｓ ｉ）よりもメカ
ノケミカル研磨され難い材料が使用される。また、スト
ッパー１２の形成面積は基板１１の面積の１〜２０％の
範囲とするのが好ましい。As this substrate It, at least the surface portion is made of single crystal silicon, polycrystalline silicon, or high purity quartz. Further, as the material of the stopper 12, oxides such as Sin, carbides such as SiC, 5is
A material that is more difficult to mechanochemically polish than silicon (Si) is used, such as a nitride such as Nt. Further, it is preferable that the formation area of the stopper 12 be in the range of 1 to 20% of the area of the substrate 11.
次いで、基板ｔｔのストッパ−１２形成面に、気相成長
法を用いて多結晶シリコンからなるノリコン層１３を積
層形成し、第３図に示すシリコン積層基板１４を形成す
る。このシリコン層１３の厚さはストッパー１２の厚さ
よりも大きく設定する。Next, a silicone layer 13 made of polycrystalline silicon is laminated on the surface of the substrate tt on which the stopper 12 is to be formed by using a vapor phase growth method to form a silicon laminated substrate 14 shown in FIG. 3. The thickness of this silicon layer 13 is set to be larger than the thickness of the stopper 12.
次いでこのシリコン積層基板１４をメカノケミカル研磨
して、第３図に示す研磨取代１５の部分、すなわちスト
ッパー１２の厚さ以上のシリコン層部分を研磨除去する
。この研磨方法は、定盤を回転させ、この定盤面に粒度
０．０２μｍ程度の粒度を有する高純度５ｉｎｓ粒子が
分散されたｐＨｌ０〜１１のアルカリ溶液を滴下する。Next, this silicon laminated substrate 14 is mechanochemically polished to remove a portion of the polishing allowance 15 shown in FIG. In this polishing method, a surface plate is rotated, and an alkaline solution having a pH of 10 to 11 in which high-purity 5-ins particles having a particle size of about 0.02 μm are dispersed is dripped onto the surface of the surface plate.
そしてこの定盤面に平行に配置された平坦な支持台にシ
リコン積層基板１４を固定し、シリコン層１３の面を定
盤に圧着し、摩擦することによってシリコン層１３を無
歪鏡面に研磨する。このときシリコン層１３の表面は、
メカノケミカル反応により研磨される。またこの研磨は
、シリコン部分においては良好に進行するが、定盤面が
シリコンよりも研磨し難い材料からなるストッパー１２
に当接した時点で研磨速度が急激に低下する。したがっ
て研磨速度が急激に低下した時点で研磨を停止すれば、
第４図に示すように、基板ｌｌ上にストッパー１２の厚
さと同一の厚さにシリコン層１３が残り、基板１１上に
所定厚さのシリコン層１３が無歪鏡面の状態で形成され
たウェーハ１６が得られる。Then, the silicon laminated substrate 14 is fixed to a flat support placed parallel to the surface of the surface plate, and the surface of the silicon layer 13 is pressed against the surface plate, and the silicon layer 13 is polished to a distortion-free mirror surface by friction. At this time, the surface of the silicon layer 13 is
Polished by mechanochemical reaction. Further, although this polishing progresses well in the silicon portion, the stopper 12 whose surface plate surface is made of a material that is more difficult to polish than silicon.
The polishing speed decreases rapidly when it comes into contact with. Therefore, if you stop polishing when the polishing speed suddenly decreases,
As shown in FIG. 4, a wafer in which a silicon layer 13 remains on the substrate 11 with the same thickness as the stopper 12, and a silicon layer 13 of a predetermined thickness is formed on the substrate 11 in a mirror-free state. 16 is obtained.
この例によるウェーハの製造方法では、基板１１の表面
にストッパー１２とノリコン層１３を積層形成した後、
表面が平滑な定盤を回転させ、その表面に、５ｉＯｙ微
粒子が分散されたアルカリ溶液を供給し、該定盤の表面
に平行に配置された平坦な支持台に上記基板を固定して
該定盤の表面にシリコン層１３を圧着し、摩擦させて無
歪鏡面研磨することにより、基板１１上にストッパー１
２と同一の厚さの無歪鏡面のシリコン層１３を形成でき
るので、ストッパー１２の厚さを、形成すべきシリコン
層ｉ３の厚さに設定しておくことにより、基板＋１上に
、極めて正確な厚さの無歪のシリコン層１３を形成する
ことができる。In the wafer manufacturing method according to this example, after forming the stopper 12 and the laminated layer 13 on the surface of the substrate 11,
A surface plate with a smooth surface is rotated, an alkaline solution in which 5iOy fine particles are dispersed is supplied to the surface of the surface plate, and the substrate is fixed on a flat support placed parallel to the surface of the surface plate. A stopper 1 is formed on the substrate 11 by pressing the silicon layer 13 onto the surface of the board and polishing it to a distortion-free mirror surface by friction.
By setting the thickness of the stopper 12 to the thickness of the silicon layer i3 to be formed, it is possible to form a silicon layer 13 with an undistorted mirror surface having the same thickness as that of the silicon layer i3 on the substrate +1. The strain-free silicon layer 13 can be formed to have a certain thickness.
次に、本発明方法に基づいてウェーハの製造を実施した
製造例（製造例１、製造例２）を示す。Next, manufacturing examples (Manufacturing Example 1 and Manufacturing Example 2) in which wafers were manufactured based on the method of the present invention will be shown.
（製造例１）
第５図ないし第７図は本発明によるウェーハの一製造例
を工程順に説明する図である。この例では、単結晶シ・
リコンからなる基板２１の表面に、深さ０．１μｍの溝
２２を１０μｍの間隔で形成し、かつその表面を熱酸化
して形成されたウェーハＡと、上記基板２Ｉと同様の基
板２３の表面を熱酸化して形成したウェーハＢとを重ね
合わせ、両者を水素結合により接合させて、第５図に示
す接合基板２４を作成した。なお、上記ウェーハＡ表面
のＳ ｉ Ｏを層２５ａの厚さは０．１μｍとし、ウェ
ーハ８表面のＳ ｉＯを層２５ｂの厚さは０．９μｍと
した。また、ウェーハＡのＩＷｔ２２内にはポリシリコ
ン２６を充填した。(Manufacturing Example 1) FIGS. 5 to 7 are diagrams illustrating an example of manufacturing a wafer according to the present invention in the order of steps. In this example, the single crystal
A wafer A is formed by forming grooves 22 with a depth of 0.1 μm at intervals of 10 μm on the surface of a substrate 21 made of silicon and thermally oxidizing the surface, and a surface of a substrate 23 similar to the substrate 2I described above. The bonded substrate 24 shown in FIG. 5 was created by stacking the wafer B and the wafer B formed by thermally oxidizing and bonding them together by hydrogen bonding. The thickness of the SiO layer 25a on the surface of the wafer A was 0.1 μm, and the thickness of the SiO layer 25b on the surface of the wafer 8 was 0.9 μm. Further, the IWt 22 of the wafer A was filled with polysilicon 26.
次に、接合基板２４のウェーハＡの裏面側から、ウェー
ハＡを２μｍ程度の厚さ残存させるように研削し、第６
図に示す半研磨基板２７とした。Next, the wafer A is ground from the back surface side of the wafer A of the bonding substrate 24 so that a thickness of about 2 μm remains.
A semi-polished substrate 27 shown in the figure was obtained.
続いて、定盤（表面荒さ０．０１μｍ）を回転させ、そ
の表面に粒度０．０２μｍの高純度石英粒子を５ｗｔ％
分散させたｐＨ１０，５のアルカリ溶液を滴下させつつ
、この定盤の表面に上記半研磨基板２７のウェーハＡ面
を２００９／ ｃ＋ｎ”の圧力で圧着摩擦させて研磨を
行った。研磨開始から約２０分経過後、定盤にウェーハ
Ａの１Ｆｉｔ２２部分にあたる一部のＳｉ０ｇ層２５ａ
（ストッパー）が当接して研磨がほとんど進行しなくな
り、この時点で研磨を中止した。Next, a surface plate (surface roughness 0.01 μm) was rotated, and 5 wt% of high-purity quartz particles with a particle size of 0.02 μm were added to the surface.
While dropping a dispersed alkaline solution with a pH of 10.5, the wafer A surface of the semi-polished substrate 27 was pressed and rubbed onto the surface of this surface plate at a pressure of 2009/c+n" to perform polishing. Approximately from the start of polishing After 20 minutes, a part of the Si0g layer 25a corresponding to 1Fit22 part of wafer A is placed on the surface plate.
(stopper) abutted and polishing hardly progressed, and polishing was stopped at this point.
以上の操作により、第７図に示すように、つ工−ハＢの
上方に、溝２２の深さに等しい厚さを有する無歪のシリ
コン層２８が形成されたウェーハ２９が得られた。Through the above operations, a wafer 29 was obtained in which a strain-free silicon layer 28 having a thickness equal to the depth of the groove 22 was formed above the tool B, as shown in FIG.
そして、得られたウェーハ２９を用いてデバイスの作成
を実施したところ、シリコン層２８に高品質のデバイス
を作成することができた。Then, when a device was created using the obtained wafer 29, a high quality device could be created on the silicon layer 28.
（製造例２ ）
第８図ないし第１０図は本発明によるウェーハの他の製
造例を工程順に説明する図である。この例では、まず、
単結晶シリコンからなる基板の表面を熱酸化して、厚さ
１．０μｍの５ｉＯｚ層を形成し、更にこの５ｉＯｚ層
に２回の転写工程とＳ４０ｇエツチング工程を行うこと
により、第８図に示すように、基板の単結晶シリコンが
局所的に露出するように基板表面を覆うとともに、局所
にストッパ一部３１が突出形成された状態の５ｉ０２層
３２が単結晶シリコン基板上に形成された基板３３を作
成した。(Manufacturing Example 2) FIGS. 8 to 10 are diagrams explaining another manufacturing example of a wafer according to the present invention in the order of steps. In this example, first,
The surface of the substrate made of single crystal silicon is thermally oxidized to form a 5iOz layer with a thickness of 1.0 μm, and this 5iOz layer is further subjected to two transfer processes and an S40g etching process to form the material shown in FIG. A substrate 33 in which a 5i02 layer 32 is formed on a single crystal silicon substrate, covering the surface of the substrate so that the single crystal silicon of the substrate is locally exposed, and having a locally protruding stopper portion 31 formed thereon. It was created.
次に、選択エビタキンヤル法により基板３３の単結晶シ
リコン露出部のみから結晶成長させることにより、基板
３３の表面に第９図に示すようなエピタキシャルＳｉ層
３４を形成する。選択エピタキシャル法の条件としては
、基板３３を水素中、１１００℃で１０分間熱処理し、
引き続いて９００℃、３０ Ｔｏｒｒの条件下で、５ｉ
ＨｔＣ１ｔとＨＣｌとＨ７の混合ガスを供給して基板３
３表面にエピタキシャル成長させた。このときの結晶成
長速度は縦方向、横方向とも０．１μｉ／ｌ１ｌｉｎ、
であった。Next, an epitaxial Si layer 34 as shown in FIG. 9 is formed on the surface of the substrate 33 by growing crystals only from the exposed portion of the single crystal silicon of the substrate 33 using the selective epitaxial method. The conditions for the selective epitaxial method include heat treating the substrate 33 in hydrogen at 1100° C. for 10 minutes;
Subsequently, 5i was heated at 900°C and 30 Torr.
The substrate 3 is supplied with a mixed gas of HtC1t, HCl, and H7.
3 epitaxial growth was performed on the surface. The crystal growth rate at this time was 0.1μi/llin in both the vertical and horizontal directions.
Met.
次に、エピタキシャルＳｉ層３４を、先の製造例１と同
様の研磨方法を用いて研磨した。そして約２０分の研磨
によって、エピタキシャルＳｉ層３４をストッパ一部３
１の位置まで研磨することができ、この研磨によって第
１０図に示すように、基板３３上に、ストッパ一部３１
あるいはストッバ一部３１とＳｉｎ！層３２層厚２に等
しい厚さのシリコン層３５が形成されたつｆ−ハ３６が
得られた。Next, the epitaxial Si layer 34 was polished using the same polishing method as in Manufacturing Example 1 above. Then, by polishing for about 20 minutes, the epitaxial Si layer 34 is removed from the stopper part 3.
As a result of this polishing, as shown in FIG.
Or Stopba Part 31 and Sin! A silicon layer 35 having a thickness equal to the layer thickness 2 of the layer 32 was obtained.
そして、得られたウェーハ３６を用いてデバイスの作成
を実施したところ、シリコン層３５に高品質のデバイス
を作成することができた。Then, when a device was created using the obtained wafer 36, a high quality device could be created on the silicon layer 35.
なお、本発明において、研磨するシリコン層は、単結晶
、多結晶または非晶質シリコンのいずれでも良い。In the present invention, the silicon layer to be polished may be made of single crystal, polycrystal, or amorphous silicon.
また研磨は、定盤の回転だけに限定されるしのではなく
、基板の支持台または定盤と基板の支持台の双方を移動
させても良い。Further, polishing is not limited to only rotating the surface plate, but may also move the substrate support or both the surface plate and the substrate support.
さらにまた、研磨面は基板の一方の面に限定されるもの
ではなく、表面に生成されたシリコン層と同時に基板裏
面を研磨する事、および基板の両面に形成されたシリコ
ン層を同時に研磨することも可能である。Furthermore, the polishing surface is not limited to one side of the substrate; the back side of the substrate can be polished at the same time as the silicon layer formed on the front surface, and the silicon layers formed on both sides of the substrate can be polished at the same time. is also possible.
「発明の効果」
以上説明したように本発明によれば、基板の表面にスト
ッパーとシリコン層を積層形成した後、表面が平滑な定
盤を回転させ、その表面に、研磨剤が分散されたアルカ
リ溶液を供給し、該定盤の表面に平行に配置された平坦
な支持台に上記基板を固定して該定盤の表面にシリコン
層を圧着し、摩擦させて無歪鏡面研磨することにより、
基板上にストッパーと同一の厚さの無歪鏡面のシリコン
層を形成できるので、ストッパーの厚さを、形成すべき
シリコン層の厚さに設定しておくことにより、基板上に
、極めて正確な厚さの無歪のシリコン層を形成すること
ができる。"Effects of the Invention" As explained above, according to the present invention, after a stopper and a silicon layer are laminated on the surface of a substrate, a surface plate with a smooth surface is rotated, and an abrasive is dispersed on the surface. By supplying an alkaline solution, fixing the substrate on a flat support placed parallel to the surface of the surface plate, pressing the silicon layer onto the surface of the surface plate, and applying friction to polish the substrate to a distortion-free mirror surface. ,
It is possible to form an undistorted mirror silicon layer on the substrate with the same thickness as the stopper, so by setting the thickness of the stopper to the thickness of the silicon layer to be formed, an extremely accurate layer can be formed on the substrate. A thick unstrained silicon layer can be formed.
第１図ないし第４図は本発明の一実施例を説明するため
の断面図、第５図ないし第７図は本発明の一製造例を工
程順に説明するための断面図、第８図ないし第１θ図は
本発明の他の製造例を工程順に説明するための断面図、
第１１図ないし第１３図は従来のウェーハの製造方法の
例を説明するための断面図である。
１１．２３．３３・・・基板
１２・・・ストッパー
１３．２８．３５・・・シリコン層
ｌ ｇ、２９．３６・・・ウェーハ
３１・・・ストッパ一部（ストッパー）。1 to 4 are sectional views for explaining an embodiment of the present invention, 5 to 7 are sectional views for explaining a manufacturing example of the present invention in the order of steps, and 8 to 4 are sectional views for explaining an embodiment of the present invention. Figure 1θ is a sectional view for explaining another manufacturing example of the present invention in the order of steps;
11 to 13 are cross-sectional views for explaining an example of a conventional wafer manufacturing method. 11.23.33...Substrate 12...Stopper 13.28.35...Silicon layer lg, 29.36...Wafer 31...Part of stopper (stopper).
Claims (1)
リコンに比べ、メカノケミカル研磨され難い材料からな
るストッパーを形成し、次いで該ストッパーが形成され
た基板の表面に、少なくとも該ストッパーの厚さ以上の
厚さを有するシリコン層を形成し、次いで表面が平坦か
つ平滑な定盤と、前述のシリコン層の間に高純度石英か
らなる研磨剤が分散されたアルカリ溶液を供給し、前述
定盤とシリコン層の相対的加工移動により無歪鏡面研磨
することを特徴とするウェーハの製造方法。A stopper made of a material that is less susceptible to mechanochemical polishing than silicon is formed on at least one side of a substrate having a flat surface, and then a stopper made of a material that is less susceptible to mechanochemical polishing than silicon is formed on the surface of the substrate on which the stopper is formed. A silicon layer having a thickness is formed, and then an alkaline solution containing an abrasive made of high-purity quartz dispersed is supplied between a surface plate having a flat and smooth surface and the silicon layer. A method for manufacturing a wafer, characterized in that distortion-free mirror polishing is performed by relative processing movement of layers.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63180010A JPH0228925A (en) | 1988-07-19 | 1988-07-19 | Manufacture of wafer |
| EP89110984A EP0348757B1 (en) | 1988-06-28 | 1989-06-16 | Method for polishing a silicon wafer |
| DE68920365T DE68920365T2 (en) | 1988-06-28 | 1989-06-16 | Process for polishing a semiconductor wafer. |
| US07/367,637 US5096854A (en) | 1988-06-28 | 1989-06-19 | Method for polishing a silicon wafer using a ceramic polishing surface having a maximum surface roughness less than 0.02 microns |
| KR1019890008887A KR0145300B1 (en) | 1988-06-28 | 1989-06-27 | Polishing method of silicon wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63180010A JPH0228925A (en) | 1988-07-19 | 1988-07-19 | Manufacture of wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0228925A true JPH0228925A (en) | 1990-01-31 |
Family
ID=16075877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63180010A Pending JPH0228925A (en) | 1988-06-28 | 1988-07-19 | Manufacture of wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0228925A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5804495A (en) * | 1990-04-24 | 1998-09-08 | Mitsubishi Materials Corporation | Method of making SOI structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582040A (en) * | 1981-06-26 | 1983-01-07 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS59136943A (en) * | 1983-01-27 | 1984-08-06 | Nec Corp | Element isolation process of semiconductor device |
| JPS6230333A (en) * | 1985-05-20 | 1987-02-09 | ナルコ ケミカル カンパニ− | Method and composition for grinding silicon wafer |
-
1988
- 1988-07-19 JP JP63180010A patent/JPH0228925A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582040A (en) * | 1981-06-26 | 1983-01-07 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS59136943A (en) * | 1983-01-27 | 1984-08-06 | Nec Corp | Element isolation process of semiconductor device |
| JPS6230333A (en) * | 1985-05-20 | 1987-02-09 | ナルコ ケミカル カンパニ− | Method and composition for grinding silicon wafer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5804495A (en) * | 1990-04-24 | 1998-09-08 | Mitsubishi Materials Corporation | Method of making SOI structure |
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