JPH10199840A - Manufacture of soi substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an SOI substrate without affecting a variety of film width of a semiconductor substrate on a variety of the film width of an SOI layer and allowing an increase in uniformity of the film width of the SOI layer. SOLUTION: In a method of manufacturing an SOI substrate, first, a spot which is to become an element separation region on the surface of a semiconductor (silicon) substrate 1 is selectively etched. Next, a silicon oxide film 3 is formed on the surface of the etched semiconductor substrate 1. Next, after flattening the surface of the silicon oxide film 3, hydrogen is ion-implanted on the surface of the silicon oxide film 3, so as to form a hydrogen ion distribution layer 2 inside the semiconductor substrate 1. Next, polycrystalline silicon 4 is formed on the silicon oxide film 3, and the surface of this polycrystalline silicon 4 is bonded with the surface of the other substrate. Then, the semiconductor substrate 1 is cleaved on the surface of a distribution layer 2 of hydrogen ions by applying heat treatment. Next, a silicon layer surrounded by the silicon oxide film of an element separation region 11 is formed from the cleaved surface of the semiconductor substrate 1 by performing grinding and polishing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SOI (Silicon O
The present invention relates to a method for manufacturing an n-insulator substrate, and more particularly to a method for manufacturing an SOI substrate by combining bonding and selective polishing.

[0002]

2. Description of the Related Art SOI (Silicon on Ins)
The ullator substrate is suitable for application to a substrate such as a super LSI.

In a conventional method for manufacturing an SOI substrate, after forming irregularities on the surface of a silicon substrate, a silicon oxide layer and a polycrystalline silicon layer are formed so as to cover the irregularities, and the surface of the polycrystalline silicon layer is formed. Is flattened. Then, after the flattened surface of the polycrystalline silicon layer is bonded to another substrate, the silicon substrate is thinned only by grinding and polishing from the back side of the silicon substrate to form an SOI layer (silicon layer) composed of a part of the silicon substrate. ) Was formed.

In this manufacturing method, by forming elements on a silicon substrate before bonding the silicon substrate to another substrate, the elements can be formed on both sides of the SOI layer, so that various applications can be expected.

Here, a method for manufacturing an SOI substrate by a conventional method will be described with reference to FIGS. First, FIG.
As shown in A, the element isolation region 11 on the surface of the semiconductor (silicon) substrate 1 is etched to, for example, about 100 nm to form a concave portion.

Subsequently, as shown in FIG. 7B, the silicon oxide film 3 is formed to a thickness of 100 nm to 1 nm by thermal oxidation and CVD.
It is formed to a thickness of about μm.

Subsequently, a layer made of polycrystalline silicon 4 is
It is deposited by the VD method (thickness is, for example, 5 μm), and its surface is polished into a flat polished surface 8 (FIG. 7B shows a state after polishing).

Next, the surface of the polycrystalline silicon 4 is bonded to the surface of another substrate 5 serving as a base. In FIG. 7C, FIG.
Is shown upside down, that is, the back surface of the semiconductor substrate 1 faces upward. Here, the other substrate 5 serving as a base is not limited to a semiconductor substrate, but may be any substrate as long as it can be bonded and is compatible with a subsequent semiconductor process.

Next, by grinding and polishing from the back surface of the semiconductor substrate 1 from above in FIG.
1 silicon layer (SOI)
Layer 7 only (FIGS. 8B, C). Here, the polishing is performed by physical polishing using chemical polishing in combination with a polishing liquid to obtain a selectivity between the silicon oxide film 3 and the silicon layer (SOI layer) 7.

At this time, even if the thickness of the semiconductor substrate 1 varies, the silicon oxide film 3 in the element isolation region 11 serves as a physical stopper. Specifically, as shown in FIG. 8C, a silicon layer (SOI layer) 7 surrounded by the silicon oxide film 3 in the element isolation region can be formed.

However, in the portion where the semiconductor substrate 1 is thin, that is, in the SOI layer on the left side of FIG.
The surface of the OI layer 7 is dented.

In other words, if the whole is polished so that no silicon remains on the element isolation region, the thickness of the SOI layer will vary in the plane of the semiconductor substrate.

[0013]

By the way, there is a problem that such a variation in the thickness of the SOI layer causes a variation in characteristics of an element formed thereon.

Further, when transistors are miniaturized to meet the demand for high integration of ICs, S is used to prevent punch-through.
Although the necessity of reducing the thickness of the OI layer increases, the SOI
The variation in the thickness of the layer becomes more remarkable as the layer becomes thinner. In an extreme case, there is a problem that the SOI layer is partially lost.

To solve this problem, it is necessary to reduce the variation in the film thickness of the semiconductor substrate. However, since the thickness of the semiconductor substrate having a larger diameter is also increased, the variation in the film thickness is more and more required in the future. Values tend to be large. For example, a 5-inch silicon wafer has a thickness of about 600 μm.
m, but the thickness of an 8-inch wafer is about 800 μm.

The present invention has been made in view of such conventional problems, and the variation in the thickness of the semiconductor substrate does not affect the variation in the thickness of the SOI layer. It is an object of the present invention to obtain a method for manufacturing an SOI substrate which can increase the uniformity of the thickness of the SOI layer and further reduce the thickness of the SOI layer.

[0017]

A method of manufacturing an SOI substrate according to the present invention comprises the steps of: implanting hydrogen ions into a surface of a semiconductor (silicon) substrate to form a hydrogen ion distribution layer in the semiconductor substrate; A step of selectively etching a portion of the surface of the semiconductor substrate to be an element isolation region; a step of forming a silicon oxide film on the etched surface of the semiconductor substrate; and forming polycrystalline silicon on the silicon oxide film A step of bonding the surface of the polycrystalline silicon to the surface of another substrate, a step of cleaving the semiconductor substrate at the surface of the hydrogen ion distribution layer by applying a heat treatment, and a step of grinding, This is a method including a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region by polishing.

Further, the method of manufacturing an SOI substrate according to the present invention comprises:
A step of selectively etching an element isolation region on the surface of a semiconductor (silicon) substrate, a step of forming a silicon oxide film on the etched surface of the semiconductor substrate, and planarizing the surface of the silicon oxide film Forming a distribution layer of hydrogen ions in the semiconductor substrate by implanting hydrogen ions into the surface of the silicon oxide film; forming polycrystalline silicon on the silicon oxide film; Bonding the substrate to the surface of another substrate, applying heat treatment to cleave the semiconductor substrate on the surface of the hydrogen ion distribution layer, and from the cleavage surface of the semiconductor substrate,
This method includes a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region by grinding and polishing.

Further, a method of manufacturing an SOI substrate according to the present invention
A step of selectively etching an element isolation region on the surface of a semiconductor (silicon) substrate, a step of forming a silicon oxide film on the etched surface of the semiconductor substrate, and planarizing the surface of the silicon oxide film Performing a step of forming polycrystalline silicon on the silicon oxide film, a step of flattening the surface of the polycrystalline silicon, and ion-implanting hydrogen into the surface of the polycrystalline silicon to form hydrogen ions in the semiconductor substrate. A step of forming a distribution layer, a step of bonding the surface of polycrystalline silicon to the surface of another substrate, a step of cleaving the semiconductor substrate at the surface of the hydrogen ion distribution layer by applying heat treatment, From the cleavage plane of the substrate, grinding,
This is a method including a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region by polishing.

According to the SOI substrate manufacturing method of the present invention,
Even if the thickness of the semiconductor substrate varies, the uniformity of the thickness of the SOI layer can be increased without affecting the variation of the thickness of the SOI layer. Can be stabilized. Further, since there is little variation in the thickness of the SOI layer, the thickness of the SOI layer can be reduced, and the SOI element can be miniaturized.

Further, according to the method of manufacturing an SOI substrate of the present invention, the process is not restricted by the temperature until hydrogen ions are implanted.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing an SOI substrate according to the present invention will be described below with reference to FIGS.

Embodiment 1 First, with respect to Embodiment 1, details of a method for manufacturing an SOI substrate will be described. First, as shown in FIG. 1A, hydrogen is ion-implanted into the surface of the semiconductor (silicon) substrate 1. At this time, the hydrogen ion distribution layer 2 is, for example, about 5
It has a peak at a depth of about 00 nm, and the implantation concentration is in the range of 10 ¹⁹ / cm ³ to 10 ²¹ / cm ³ . In the ion implantation method, the hydrogen ion distribution layer 2
Can be formed very uniformly.

In the embodiment described above, the hydrogen ion distribution layer 2 has a peak at a depth of about 500 nm from the surface, but the present invention is not limited to this depth. That is, the depth of the hydrogen ion distribution layer is 200 nm to 1 μm.
Is desirably within the range. If the depth of the hydrogen ion distribution layer is smaller than 200 nm, the crystal lattice of a silicon layer (SOI layer) formed in a later step may be damaged. If the depth is smaller than 1 μm, This is because the time required for the steps of grinding and polishing the semiconductor (silicon) substrate 1 to be described later may be long, or the parallelism between the ground / polished surface and the cleavage plane may not be maintained due to uneven grinding and polishing. .

Next, as shown in FIG. 1B, the semiconductor substrate 1
Is selectively etched on the surface portion of the substrate, which will be the element isolation region 11 later. The etching depth is, for example, 10
0 nm or less.

Next, a silicon oxide film 3 is formed on the etched surface of the semiconductor substrate 1 by thermal oxidation or CVD.
(The thickness is, for example, 100 nm to 1 μm).
Further, polycrystalline silicon 4 (having a thickness of, for example, 5 μm) is formed by a CVD method, and its surface is polished to a flat bonded surface. FIG. 1C shows a state after polishing of the polycrystalline silicon 4.

Next, as shown in FIGS. 2A and 2B, the surface of the polycrystalline silicon layer 4 is bonded to the surface of another substrate 5 serving as a base. Here, the substrate 5 serving as a base is not necessarily limited to a semiconductor substrate, but can be bonded, and a substrate of any material may be used as long as it is compatible with a subsequent semiconductor process. In the bonding, first, any surface is made hydrophilic by washing. Subsequently, when they are brought into contact, they adhere by hydrogen bonding. (In some cases, they are joined by van der Waals force.)

Next, as shown in FIG.
By applying a heat treatment at 0 ° C., the semiconductor substrate 1 is cleaved on the surface of the hydrogen ion distribution layer 2. Subsequently, 1100
By applying a heat treatment at a high temperature of about ℃, the adhesive strength of the bonded surface is strengthened.

Next, as shown in FIG. 3A, the semiconductor substrate is turned upside down, that is, the back surface of the semiconductor substrate is turned upward. Then, from the cleavage plane of the semiconductor substrate 1,
In FIG. 3A, the silicon layer (SO) surrounded by the silicon oxide film 3 in the element isolation region is ground and polished from above.
Only the I layer 7 is left (FIG. 3B). Here, the polishing is performed by physical polishing using chemical polishing together with a polishing liquid, so that the silicon oxide film 3 and the silicon layer 7 are polished.
Take the selection ratio.

Here, the variation in the film thickness of the semiconductor (silicon) substrate layer 1a to be polished is extremely uniform because it is determined by the depth of the hydrogen ion distribution layer. Much smaller than the variation. For this reason, when the silicon substrate is polished so that there is no silicon residue, the time for over-polishing is short, so that extra chemical polishing is partially performed and the surface of the SOI layer is dented more than the surface of the element isolation region. There is no such thing.

Embodiment 2 In Embodiment 1, hydrogen is ion-implanted into the semiconductor substrate 1.
Although the phenomenon that the semiconductor substrate 1 is cleaved by applying a heat treatment at 400 to 500 ° C. is used, there is a restriction that a heat treatment at a high temperature of 400 ° C. or higher cannot be applied after hydrogen ion implantation.

In the second embodiment, an SOI that can solve this point
Details of the method of manufacturing the substrate will be described with reference to the drawings.

First, as shown in FIG.
Is selectively etched on the surface portion of the substrate, which will be the element isolation region 11 later. The etching depth is, for example, 10
0 nm or less.

Next, as shown in FIG. 4B, a silicon oxide film 3 (having a thickness of, for example, 100 nm or less) is formed on the etched surface of the semiconductor substrate 1 by thermal oxidation or CVD.
1 μm). Since the temperature of the formation of the silicon oxide film 3 is not particularly limited, a high-quality oxide film can be formed at a sufficiently high temperature (for example, 400 ° C. or higher).

Subsequently, the surface of the silicon oxide film 3 is flattened. As the method of planarization, any method may be used because there is no restriction on temperature.

Subsequently, hydrogen ions are implanted from the front side of the semiconductor (silicon) substrate 1. At this time, the hydrogen ion distribution layer 2 is, for example, about 500 nm from the surface of the substrate 1.
A peak at a depth of about 10 ¹⁹
/ Cm ³ to 10 ²¹ / cm ³ . In the method by ion implantation, the depth from the surface to the hydrogen ion distribution layer 2 can be formed extremely uniformly.

In the above-described embodiment, the hydrogen ion distribution layer 2 has a peak at a depth of about 500 nm from the surface of the substrate 1. However, the present invention is not limited to this depth. The depth of the distribution layer is 200 nm to 1 μm
Is desirably within the range described in the first embodiment.

Next, polycrystalline silicon 4 (having a thickness of, for example, 5 μm) is formed by a CVD method, and its surface is polished to a flat bonded surface. FIG. 4C shows a state after polishing of the polycrystalline silicon 4. The implantation of hydrogen ions can also be performed after polishing the polycrystalline silicon 4 in FIG. 4C. In this case, high energy ion implantation is required, but polycrystalline silicon can be formed at a high temperature (for example, 400 ° C. or higher).

Next, as shown in FIGS. 5A and 5B, the surface of the polycrystalline silicon layer 4 is bonded to the surface of another substrate 5 serving as a base. Here, the other substrate 5 serving as a base is not limited to a semiconductor substrate, but may be any substrate as long as it can be bonded and is compatible with a subsequent semiconductor process.

Next, as shown in FIG.
By applying a heat treatment at 0 ° C., the semiconductor substrate 1 is cleaved on the surface of the hydrogen ion distribution layer. Subsequently, 1100 ° C
By applying a high-temperature heat treatment to a certain degree, the bonding strength of the bonded surfaces is strengthened.

Next, as shown in FIG. 6A, the semiconductor substrate is turned upside down, that is, the back surface of the semiconductor substrate is turned upward. Then, from the cleavage plane of the semiconductor substrate 1,
In FIG. 6A, the silicon layer (SO) surrounded by the silicon oxide film 3 in the element isolation region is obtained by grinding and polishing from above.
Only the I layer 7 is left (FIG. 6B). Here, the polishing is performed by physical polishing using chemical polishing in combination with a polishing liquid to obtain a selectivity between the silicon oxide film 3 and the silicon layer (SOI layer) 7.

Here, the variation in the film thickness of the semiconductor (silicon) substrate 1a to be polished is extremely uniform because it is determined by the depth of the hydrogen ion distribution layer. Much smaller than the variation. For this reason, when the silicon substrate is polished so that there is no silicon residue, the time for over-polishing is short, so that extra chemical polishing is partially performed and the surface of the SOI layer is dented more than the surface of the element isolation region. There is no such thing.

As described above, according to this example, even if the thickness of the semiconductor substrate varies, the thickness of the SOI layer does not vary, and the element formed thereon can be stabilized. it can. Further, since the variation in the SOI layer is small, the thickness can be reduced, and the SOI element can be miniaturized.

Since the temperature of the formation of the silicon oxide film 3 is not particularly limited, a high-quality oxide film can be formed at a sufficiently high temperature (for example, 400 ° C. or higher). Still further, polycrystalline silicon can be formed at a high temperature (for example, 400 ° C. or higher).

It should be noted that the present invention is not limited to the above-described embodiment, but can adopt various other configurations without departing from the gist of the present invention.

[0046]

As described above, according to the present invention,
Even if the thickness of the semiconductor substrate varies, the thickness of the SOI layer does not vary, and the element formed thereon can be stabilized. In addition, since the variation in the SOI layer is small, the thickness can be reduced, and the SOI element can be miniaturized.

Further, according to the present invention, since there is no particular restriction on the temperature for forming the silicon oxide film, a high-quality oxide film can be formed at a sufficiently high temperature (for example, 400 ° C. or higher).

Further, according to the present invention, polycrystalline silicon can be formed at a high temperature (for example, 400 ° C. or higher).

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a manufacturing step of an SOI substrate according to a first embodiment (part 1).

FIG. 2 is a sectional view showing a manufacturing step of the SOI substrate according to the first embodiment (part 2).

FIG. 3 is a sectional view showing a manufacturing step of the SOI substrate according to the first embodiment (part 3).

FIG. 4 is a cross-sectional view showing a manufacturing step of the SOI substrate according to the second embodiment (part 1).

FIG. 5 is a sectional view showing a manufacturing step of the SOI substrate according to the second embodiment (part 2).

FIG. 6 is a sectional view illustrating a manufacturing step of the SOI substrate according to the second embodiment (part 3).

FIG. 7 is a cross-sectional view showing a manufacturing step of an SOI substrate according to a conventional method (part 1).

FIG. 8 is a sectional view showing a manufacturing step of an SOI substrate according to a conventional method (part 2).

[Explanation of symbols]

1 semiconductor (silicon) substrate, 2 hydrogen ion distribution layer, 3 silicon oxide film, 4 polycrystalline silicon, 5 other substrates, 6 resist, 7 silicon layer (SOI layer),
8 Polished surface, 9 Adhesive surface, 10 Cleavage surface, 11 Element isolation region, 12 Polished surface

──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. ⁶ Identification code FI H01L 21/76 D

Claims (18)

[Claims] A step of implanting hydrogen into a surface of a semiconductor (silicon) substrate to form a hydrogen ion distribution layer in the semiconductor substrate; and a step of forming a device isolation region on the surface of the semiconductor substrate. Selectively etching; forming a silicon oxide film on the etched surface of the semiconductor substrate; forming polycrystalline silicon on the silicon oxide film; Bonding the semiconductor substrate to the surface of another substrate, applying heat treatment to cleave the semiconductor substrate on the surface of the hydrogen ion distribution layer, and grinding and polishing from the cleavage surface of the semiconductor substrate.
A method for manufacturing an SOI substrate, comprising a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region. 2. The step of forming a distribution layer of hydrogen ions,
The distribution layer of hydrogen ions is placed 200n from the surface of the semiconductor substrate.
2. The method for manufacturing an SOI substrate according to claim 1, wherein the SOI substrate is formed within a depth range of m to 1 [mu] m. 3. The step of forming a hydrogen ion distribution layer comprises:
The distribution layer of hydrogen ions is placed 200n from the surface of the semiconductor substrate.
formed within a depth range of M～1myuemu, the implantation concentration of hydrogen ^{ions, 10 19 / cm 3 ~10 21} / c
2. The SO according to claim 1, wherein the SO is set within a range of m ^3.
A method for manufacturing an I substrate. 4. The step of forming a distribution layer of hydrogen ions,
A distribution layer of hydrogen ions is formed from the surface of the semiconductor substrate by about 500
2. The method for manufacturing an SOI substrate according to claim 1, wherein the SOI substrate is formed to a depth of about nm. 5. The step of forming a hydrogen ion distribution layer comprises:
A distribution layer of hydrogen ions is formed from the surface of the semiconductor substrate by about 500
formed at a depth of about nm, and implanted hydrogen ions at a concentration of 10 ¹⁹ / cm ³ to 10 ²¹ / c.
2. The SO according to claim 1, wherein the SO is set within a range of m ^3.
A method for manufacturing an I substrate. 6. A step of selectively etching a surface of a semiconductor (silicon) substrate to be an element isolation region; a step of forming a silicon oxide film on the etched surface of the semiconductor substrate; A step of flattening the surface of the oxide film; a step of implanting hydrogen ions into the surface of the silicon oxide film to form a hydrogen ion distribution layer in the semiconductor substrate; and a step of forming polycrystalline silicon on the silicon oxide film. A step of bonding the surface of the polycrystalline silicon to the surface of another substrate; a step of cleaving the semiconductor substrate on the surface of the hydrogen ion distribution layer by applying a heat treatment; By grinding and polishing from the cleavage plane of
A method for manufacturing an SOI substrate, comprising a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region. 7. The step of forming a hydrogen ion distribution layer comprises:
The distribution layer of hydrogen ions is placed 200n from the surface of the semiconductor substrate.
The method for manufacturing an SOI substrate according to claim 6, wherein the SOI substrate is formed within a depth range of m to 1 μm. 8. The step of forming a hydrogen ion distribution layer comprises:
The distribution layer of hydrogen ions is placed 200n from the surface of the semiconductor substrate.
formed within a depth range of M～1myuemu, the implantation concentration of hydrogen ^{ions, 10 19 / cm 3 ~10 21} / c
7. The SO according to claim 6, wherein the range is m ^3.
A method for manufacturing an I substrate. 9. The step of forming a hydrogen ion distribution layer comprises:
A distribution layer of hydrogen ions is formed from the surface of the semiconductor substrate by about 500
7. The method for manufacturing an SOI substrate according to claim 6, wherein said SOI substrate is formed to a depth of about nm. 10. The step of forming a distribution layer of hydrogen ions includes forming the distribution layer of hydrogen ions by about 5 μm from the surface of the semiconductor substrate.
It is formed at a depth of about 00 nm, and the implantation concentration of hydrogen ions is 10 ¹⁹ / cm ³ to 10 ²¹ / c
7. The SO according to claim 6, wherein the range is m ^3.
A method for manufacturing an I substrate. 11. The SO according to claim 6, wherein the step of forming the silicon oxide film comprises forming the silicon oxide film at 400 ° C. or higher.
A method for manufacturing an I substrate. 12. A step of selectively etching a surface of a semiconductor (silicon) substrate to be an element isolation region; a step of forming a silicon oxide film on the etched surface of the semiconductor substrate; A step of flattening the surface of the oxide film, a step of forming polycrystalline silicon on the silicon oxide film, a step of flattening the surface of the polycrystalline silicon, and ion implantation of hydrogen into the surface of the polycrystalline silicon Forming a distribution layer of hydrogen ions in the semiconductor substrate; bonding the surface of the polycrystalline silicon to the surface of another substrate; and applying heat treatment to form a distribution layer of the hydrogen ions. By cleaving the semiconductor substrate on the surface, and by grinding and polishing from the cleavage surface of the semiconductor substrate,
A method for manufacturing an SOI substrate, comprising a step of leaving only a silicon layer surrounded by a silicon oxide film in an element isolation region. 13. The step of forming a hydrogen ion distribution layer includes forming the hydrogen ion distribution layer from the surface of the semiconductor substrate by 20%.
13. The method for manufacturing an SOI substrate according to claim 12, wherein the SOI substrate is formed within a depth range of 0 nm to 1 [mu] m. 14. The step of forming a hydrogen ion distribution layer includes forming the hydrogen ion distribution layer from the surface of the semiconductor substrate by 20 minutes.
It is formed within a depth range of 0 nm to 1 μm, and a hydrogen ion implantation concentration is set to 10 ¹⁹ / cm ³ to 10 ²¹ / c
13. S according to claim 12, wherein the range is m ^3.
A method for manufacturing an OI substrate. 15. The step of forming a hydrogen ion distribution layer includes forming the hydrogen ion distribution layer from the surface of the semiconductor substrate by about 5 μm.
13. The method for manufacturing an SOI substrate according to claim 12, wherein the SOI substrate is formed to a depth of about 00 nm. 16. The step of forming a distribution layer of hydrogen ions includes forming the distribution layer of hydrogen ions from the surface of the semiconductor substrate by about 5 μm.
It is formed at a depth of about 00 nm, and the implantation concentration of hydrogen ions is 10 ¹⁹ / cm ³ to 10 ²¹ / c
13. S according to claim 12, wherein the range is m ^3.
A method for manufacturing an OI substrate. 17. The method for manufacturing an SOI substrate according to claim 12, wherein the step of forming the silicon oxide film includes forming the silicon oxide film at 400 ° C. or higher. . 18. The step of forming a silicon oxide film comprises forming the silicon oxide film at 400 ° C. or higher, and forming the polycrystalline silicon comprises:
12. The method according to claim 12, wherein the temperature is not less than 00.degree.
18. The method for manufacturing an SOI substrate according to 3, 14, 15, 16, or 17.