JPH10242439A - Stuck silicon wafer and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the width of an imperfect stuck part by oxidizing a stuck silicon wafer in the wet atmosphere of a specified intra-furnace temperature and chamfering the outer peripheral part of a wafer for active layer to the inner side of the direction of a wafer radius. SOLUTION: Silicon single crystal is block-cut and mechanochemical grinding is executed on the crystal and the wafer 1 for active layer and a wafer 2 for supporting substrate are obtained. The wafer 1 for active layer and the wafer 2 for supporting substrate are stuck at the room temperature of a clean room. It is inserted into the quartz reaction tube of a heating furnace and an oxidation processing is executed at the wet atmosphere of the intra-furnace temperature 1,000 deg.C-1,200 deg.C. Next, the imperfect stuck part at the outer peripheral part of the active wafer 1 is chamfered to the width of not more than 1mm. Only the imperfect stuck part 1a of the wafer 1 for active layer, which needs chamfering, in the wafer 1 for active layer and the wafer 2 for supporting substrate can be chamfered.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon / silicon (Si / Si)
2. Bonded silicon wafer such as a con on insulator substrate and a method of manufacturing the same The present invention relates to a wafer and a method for manufacturing the same.

[0002]

2. Description of the Related Art A bonded silicon wafer is manufactured as follows. That is, after the silicon wafer for the active layer and the silicon wafer for the support substrate are bonded at room temperature, they are charged into a quartz reaction tube of a heating furnace. Then, high-purity O ₂ gas or an inert gas (such as N ₂ gas) is directly introduced into the reaction tube, and the bonded silicon wafer is heated under the conditions of a furnace temperature of 1100 ° C. and a heating time of 2 hours. . Thereafter, the outer peripheral edge of the bonded silicon wafer for a supporting substrate is chamfered to a width of about 3 mm in the radial direction of the wafer. Hereinafter, the reason will be described.

Conventional wafer bonding includes (1) a method of bonding a wafer for a support substrate and a wafer for an active layer such that the bonded portion is widened from the center to the outer periphery of the wafer. Further, there is also a method of (2) laminating a wafer for a support substrate and a wafer for an active layer, starting from a part of an outer peripheral portion of the wafer and expanding an adhesive portion toward another portion facing the peripheral portion. (1),
In the method (2), in the case of a normal wafer, for example, the outer peripheral portion is sagged due to polishing, so that the outer peripheral portion becomes an incompletely bonded portion.

In a bonded silicon wafer in which the active layer wafer for forming a device must be thinned by grinding and polishing, the incompletely bonded portion has lower strength than other portions. Therefore, the presence of the incompletely bonded portion causes chipping in subsequent steps. Therefore,
Usually, an incompletely bonded portion is removed by chamfering the outer peripheral portion of the bonded wafer during the manufacturing process of the bonded wafer. In this case, the width of the incompletely bonded portion of the wafer is usually 1-2 m in the wafer radial direction.
m, so the chamfer width of the bonded wafer is
It is set to about 3 mm in the radial direction of the wafer.

[0005]

Incidentally, it is advantageous that the chamfer width of the bonded wafer is as narrow as possible, because the effective area of the active layer wafer is large and the chamfering time can be shortened. Therefore, the present inventors changed the bonding start position of the wafer for the support substrate and the wafer for the active layer, the bonding direction of both wafers, and further changed the TTV
(Total Thickness Variatio
Experiments such as laminating via a polished surface with n) of 1 μm or less were repeated. In the case where the wafers are bonded by the TTV adjustment, when the TTV of the active layer wafer is reduced, the number of steps of grinding increases, resulting in an increase in cost.

However, even after repeating these experiments, there was still no prospect of shortening the chamfer width. For this reason, the present inventors changed the point of interest.
In other words, in the bonding heat treatment step using a heating furnace, the temperature in the quartz reaction tube and the type of the atmospheric gas introduced into the furnace are specified to reduce the incomplete bonding portion at the outer peripheral portion of the wafer. did. After that, based on this guideline, a new and intensive study was conducted, and as a result, the width of the outer peripheral portion of the wafer where voids were generated was reduced to approximately 3 m in the conventional case.
m was successfully reduced to 1 mm or less, and the present invention was completed.

[0007]

An object of the present invention is to provide a bonded silicon wafer and a method of manufacturing the bonded silicon wafer which can reduce the width of an incompletely bonded portion formed at the outer peripheral edge of the wafer and reduce the chamfer width of the bonded wafer to 1 mm or less. Its purpose is to provide. The purpose of this invention is
An object of the present invention is to provide a bonded silicon wafer capable of expanding an effective area of an active layer wafer and a method of manufacturing the same.

[0008]

According to a first aspect of the present invention, a silicon wafer for an active layer and a silicon wafer for a support substrate are bonded to each other, and the bonded silicon wafer is placed in a wet atmosphere at a furnace temperature of 1000 ° C. to 1200 ° C. And a chamfer having a width of 1 mm or less inward in the radial direction of the wafer at least on the outer peripheral edge of the silicon wafer for an active layer.

The bonding of the silicon wafer for the active layer and the silicon wafer for the support substrate may be performed, for example, by bonding the silicon wafer for the support substrate and the silicon wafer for the active layer from the center to the outer periphery of the wafer. Alternatively, a bonding method may be used in which the bonding portion starts from a part of the outer peripheral portion of both wafers and expands the bonded portion toward the other portion facing the outer peripheral portion.

A preferable furnace temperature is 1000 ° C to 1 ° C.
200 ° C. If the temperature is lower than 1000 ° C., the productivity is low. 1
If the temperature exceeds 200 ° C., the quartz reaction tube of the heating furnace may be deformed. Others are performed similarly to the case of normal wet oxidation. These items are the same in the case of the method for manufacturing a bonded silicon wafer according to claim 3.

According to a second aspect of the present invention, the chamfer of the bonded silicon wafer reaches not only the silicon wafer for the active layer but also a part of the silicon wafer for the support substrate. It is a bonded silicon wafer. In addition, the chamfering depth of the silicon wafer for supporting substrates may be arbitrary. This is claimed in claim 5
This also applies to the method for manufacturing a bonded silicon wafer.

According to a third aspect of the present invention, there is provided a step of bonding a silicon wafer for an active layer and a silicon wafer for a support substrate, and thereafter, bonding the silicon wafer for the active layer to a furnace temperature of 1000 ° C. to 12 ° C.
And a step of oxidizing the wafer in a wet atmosphere at 00 ° C.

According to a fourth aspect of the present invention, after the wet oxidation, at least the outer peripheral edge of the silicon wafer for the active layer is chamfered with a width of 1 mm or less inward in a radial direction of the wafer. It is a manufacturing method of the bonded silicon wafer described above. The chamfer referred to here includes not only mechanical chamfering such as grinding but also chemical chamfering by etching.

According to a fifth aspect of the present invention, the chamfering of the bonded silicon wafer reaches not only the silicon wafer for the active layer but also a part of the silicon wafer for the supporting substrate. This is a method for manufacturing a bonded silicon wafer.

[0015]

According to the bonded silicon wafer and the method for manufacturing the same, first, the silicon wafer for the active layer (mirror wafer) and the silicon wafer for the support substrate (mirror wafer) are bonded at room temperature. .
The mirror surfaces are brought into close contact with each other and overlapped.

Then, the bonded silicon wafer is heated in a furnace. At this time, the furnace temperature is set at 1000 ° C.
The temperature is set to 1200 ° C., and oxidation is performed in a wet atmosphere. For example, since the inside of the furnace is filled with O ₂ gas and heat-treated, the growth of the oxide film on each silicon wafer fills the gaps between them and the oxide film is integrated. The width in the direction decreases from 200 μm to 800 μm inward in the radial direction from the outer periphery of the wafer. Therefore, if the outer peripheral edge of the bonded silicon wafer is chamfered to at least 1 mm or less in a later step, the incompletely bonded portion is almost completely removed, and the effective area of the active layer wafer can be increased. In addition, since the chamfer width is reduced, the chamfer processing time is also reduced. Further, with the reduction in the chamfer width, the polishing surface is less likely to sag in the waxless polishing with a template after the chamfering, and the uniformity of the polishing surface of the active layer silicon wafer can be maintained. With SiO
_In the case of a silicon wafer for a support substrate having _two films,
The SiO ₂ film on the outer peripheral surface (chamfered surface) of the exposed silicon wafer for the support substrate is less likely to be damaged.

In particular, in the bonded silicon wafer and the method of manufacturing the same according to the second and fifth aspects, when the bonded silicon wafer is chamfered, the chamfer does not stop only at the outer peripheral portion of the active layer silicon wafer, but is formed for the support substrate. Since it reaches a part of the outer peripheral portion of the silicon wafer, it is easy to control the chamfering of the wafer.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described more specifically with reference to the following examples. <Examples 1 to 3 and Comparative Examples 1 and 2> In a step of pulling a silicon single crystal in advance by a CZ method, a silicon single crystal pulled at a predetermined pulling speed is cut into blocks.
Wafer cutting, chamfering, mechanical chemical polishing, and the like are performed to prepare an active layer wafer (mirror polished wafer) having a thickness of 620 μm and a diameter of 150 mm (6 inches). Further, a wafer for a supporting substrate (mirror-polished wafer) having the same thickness and the same diameter as the active layer wafer is prepared by the same manufacturing method, and an insulating film is formed on the surface of the supporting substrate wafer by wet O ₂ oxidation. Thermal oxide film (SiO ₂ )
Is formed to a thickness of 1 μm.

Next, the mirror surfaces of the wafer for the active layer and the wafer for the support substrate are overlapped with each other at room temperature in a clean room. As a result, a bonded silicon wafer is manufactured.

Thereafter, the bonded silicon wafer is inserted into a quartz reaction tube of a heating furnace, and a heating process is performed under the conditions shown in Table 1. Table 1 also shows the determination results based on the width in the wafer radial direction of the incompletely bonded portion formed between the outer peripheral portions of the wafer after the heat treatment.

[0021]

[Table 1]

As a result, in Examples 1 to 3, by setting the annealing condition to a wet atmosphere at a furnace temperature of 1000 ° C. to 1200 ° C., the width of the incompletely bonded portion in the wafer radial direction becomes 200 to 800 μm. Thus, the chamfer width of the bonded wafer could be reduced to 1 mm or less in the wafer radial direction. As a result, the effective area of the wafer is increased by about 6% as compared with the conventional case. Also, since the width of the chamfer is narrow, the chamfering time can be reduced. Further, the width of the outer peripheral portion of the wafer for the support substrate exposed from the outer edge of the wafer for the active layer in a plan view becomes narrower, the polishing dripping of the wafer for the active layer becomes smaller, and the polishing of the active layer wafer becomes uniform. Improved. Then, this embodiment 1
In the case of a wafer for a support substrate having an SiO ₂ film as in Example 3, the polishing sag is reduced during polishing of the wafer for the active layer.
_{2 The} film is less likely to be damaged.

On the other hand, in Comparative Examples 1 and 2, the width of the incompletely bonded portion exceeds 1 mm in the radial direction of the wafer. As a result, the effective area of the wafer is relatively small, and the chamfering time is long. . Then, during wax-less polishing in the subsequent process, a shoulder drop phenomenon (polishing sag) of the outer peripheral portion of the wafer for the active layer due to the large width of the incompletely bonded portion occurs, resulting in poor polishing uniformity. And the exposed SiO ₂ film of the supporting substrate wafer was damaged by the contact of the polishing cloth.

Thereafter, the incompletely bonded portion on the outer peripheral portion of the wafer for the active layer is chamfered with a width of 1 mm or less using a normal chamfering apparatus. In addition, this chamfer,
As shown in FIG. 1A, of the active layer wafer 1 and the support substrate wafer 2, the active layer wafer 1 requiring chamfering may be limited to only the incompletely bonded portion 1a. Also, considering the ease of controlling the chamfering accuracy, FIG.
As shown in (2), a part of the outer peripheral portion of the support substrate wafer 2 may be cut. As a subsequent step, the surface portion of the active layer wafer is ground with a grindstone composed of abrasive grains of about # 600 to # 2000 using a grinding device. Next, using a polishing apparatus, the surface of the active layer wafer roughened by grinding is mirror-polished with a polishing cloth to remove grinding damage, and a bonded silicon wafer is manufactured.

[0025]

As described above, according to the bonded silicon wafer of the present invention and the method of manufacturing the same, the conditions for the heat treatment after the bonding are set to a furnace temperature of 100.
Since the temperature is set to 0 ° C. to 1200 ° C. and the inside of the furnace is filled with a wet oxidizing atmosphere, the range of the incompletely bonded portion where bubbles are interposed between the wafers at the outer peripheral edge of the wafer can be significantly reduced as compared with the conventional case. it can. As a result, the effective area of the active layer wafer can be increased, the chamfering time can be reduced, and the polishing of the active layer wafer during polishing can be uniform. In addition, in the case of a support substrate wafer having an SiO ₂ film, as shown in FIG. 1A, the active layer wafer is chamfered when the active layer wafer is polished. It is difficult to damage the SiO ₂ film on the surface of the part.

In particular, in the bonded silicon wafer and the method of manufacturing the same according to the second and fifth aspects, the chamfering of the wafer after bonding is performed not only on the outer peripheral portion of the active layer wafer but also on the supporting substrate wafer. Since it reaches a part of the outer peripheral edge, it is easy to control the chamfering operation of the wafer after bonding.

[Brief description of the drawings]

FIG. 1A is an explanatory view showing a chamfering step of an active layer wafer according to an example of the present invention and a comparative example.
(B) is explanatory drawing which shows the chamfering process of another wafer for active layers.

[Description of Signs] 1 Active layer wafer, 1a Incompletely bonded portion, 2 Support substrate wafer.

Claims (5)

[Claims] 1. A silicon wafer for an active layer and a silicon wafer for a support substrate are bonded to each other, and the bonded silicon wafer is heated to a furnace temperature of 1000 ° C.
A bonded silicon wafer obtained by oxidizing in a wet atmosphere at about 1200 ° C. and then chamfering at least the outer peripheral edge of the silicon wafer for the active layer inward in the wafer radial direction with a width of 1 mm or less. 2. The bonded silicon wafer according to claim 1, wherein the chamfer of the bonded silicon wafer reaches not only the active layer silicon wafer but also a part of the support substrate silicon wafer. 3. A step of bonding a silicon wafer for an active layer and a silicon wafer for a support substrate, and thereafter, bonding the bonded silicon wafer to a furnace temperature of 1.
Oxidizing in a wet atmosphere at 000 ° C. to 1200 ° C., for producing a bonded silicon wafer. 4. After the wet oxidation, at least the outer peripheral edge of the silicon wafer for the active layer is chamfered to a width of 1 mm or less inward in a radial direction of the wafer.
3. The method for producing a bonded silicon wafer according to item 1. 5. The method for manufacturing a bonded silicon wafer according to claim 4, wherein the chamfering of the bonded silicon wafer reaches not only the silicon wafer for the active layer but also a part of the silicon wafer for the support substrate.