JPH02283055A - Capacitor formed in semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve adhesion properties of an electrode and prevent parasitic capacity from being generated by forming one electrode of the capacitor in doped polysilicon layer. CONSTITUTION:An island region 2a is formed at a semiconductor substrate where an N<-> type epitaxial layer 2 is subjected to vapor growth on a P-type semiconductor substrate 1. A doped polysilicon layer 5 with conductivity is clad on the main surface of a thermal oxide film 4 at the upper part of the island-shaped region 2a, thus forming one electrode of a capacitor. A capacitor dielectric layer is formed on the main surface of the doped polysilicon layer 5 by thermal oxidation treatment. A metal foil film layer 7 such as aluminum is clad on the main surface of the oxide film 6, thus forming the other electrode of capacitor. Since this capacitor has extremely small combined parasitic capacity generated in series, it can be used for a high-frequency capacitor, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a capacitor that is suitable for semiconductor integrated circuits and generates little parasitic capacitance, and also provides a manufacturing method thereof.

[Conventional technology]

An example of a capacitor used in a conventional semiconductor integrated circuit is shown in FIG.

In the capacitor shown in FIG. 4, epitaxial growth N2 is formed on a P-type semiconductor substrate l, and a P-type diffusion layer 3 extending to the P-type semiconductor substrate 1 is formed on the epitaxial growth N2. In this way, the N- type epitaxial growth layer 2 surrounded by the P-type semiconductor substrate 1 and the P-type diffusion layer 3 is formed, and an island-like region electrically insulated from other regions is formed. An N° type scattering layer 11 is formed within the N− type epitaxial growth layer 2 in the island-like region. An oxide film 10 is deposited on the main surface of the epitaxial growth layer 2 by diffusion of the N° type scattered layer 11, and an opening 14 exposing the N° type scattered layer 11 is formed in this oxide film IO.
A metal film 12 such as aluminum, which forms one electrode of the capacitor, is deposited on the oxide film covering the N-type diffusion layer If on the main surface of the semiconductor substrate in the island-like region. Further, in the N-type scattering layer 11, which is the other electrode of the capacitor, a metal film 13 of aluminum or the like is deposited on the exposed surface of the main semiconductor surface of the opening 14.

As shown in the equivalent circuit of FIG. 5, such a conventional capacitor has a metal film 12 and an N° type scattering layer 11 as electrodes of the capacitor between the input terminal IN and the output terminal 011T. A capacitor C having an oxide film 10 as a dielectric is formed. Further, a parasitic capacitance CIO is formed between the connection point of the capacitor C and the output terminal OUT and the ground by the horizontal P type diffusion layer 3 and the N- type epitaxial growth layer 2, and the vertical P type semiconductor substrate I A parasitic capacitance CI1 is generated by the N-type epitaxial growth layer 2, and the parasitic capacitances C0° and C11 are connected in parallel.

In addition, as another example of a conventional capacitor, a thin metal film such as aluminum, which is one electrode of the capacitor, is adhered to a semiconductor substrate on which an insulating film is adhered, and the dielectric layer of the capacitor is applied to the thin metal film. There is a capacitor having a structure in which a polysilicon layer is formed and a thin metal film such as aluminum, which is the other electrode of the capacitor, is deposited. but,
This capacitor has the disadvantage that the manufacturing process is complicated. That is, the process for forming a metal thin film such as aluminum, which is the electrode of the capacitor, becomes an additional manufacturing process.

[Problem to be solved by the invention]

In the conventional capacitor as shown in Fig. 4,
There is a drawback that, compared to the original capacitance C of the capacitor, there is a very large parasitic capacitance C1° and C21 connected in parallel between one electrode of the capacitor and the ground. Therefore, conventional capacitors that generate such parasitic capacitance have a limited usable range.

Furthermore, the latter capacitor described above has the disadvantage that the manufacturing method thereof is complicated because the metal foil film layer that serves as the electrode of the capacitor is two-layered. Therefore, the manufacturing method is complicated, which causes a decrease in yield and has the disadvantage of increasing the manufacturing cost of the capacitor.

The present invention has been made to solve the above-mentioned problems, and its main purpose is to provide a capacitor with a simple structure that is suitable for semiconductor integrated circuits, and to provide a capacitor with a simple structure. To provide a manufacturing method.

Another object of the present invention is to provide a capacitor that can prevent large parasitic capacitance from occurring at one electrode of the capacitor, and to provide a method for manufacturing the capacitor.

Another object of the invention is that one electrode of the capacitor is formed of a layer of doped polysilicon to improve the adhesion of that electrode.

[Means to try to solve the problem]

The present invention was made to solve the above-mentioned problems, and one electrode of the capacitor is made of a doped polysilicon layer, and the other electrode is made of aluminum, through a relatively thick oxide film on the top of the island region. The capacitor is made of a metal foil film such as aluminum, and uses an oxide film formed by oxidizing a doped polysilicon layer as a dielectric.

[Effect]

In the capacitor formed in the semiconductor device according to the present invention, one electrode of the capacitor is formed of a doped polysilicon layer in an island-like region electrically insulated from other regions with an insulating film interposed therebetween. The main surface of the silicon layer is oxidized to form a dielectric layer, and a metal foil film is formed on the oxide film to form the other electrode of the capacitor. This is a capacitor designed to generate parasitic capacitance.

〔Example〕

FIG. 1 shows an embodiment of a capacitor according to the present invention.

In FIG. 1, a separation diffusion layer 3 is formed from the main surface of the epitaxial layer on a semiconductor substrate on which an N-type epitaxial layer 2 is grown in vapor phase on a P-type semiconductor substrate 1, thereby allowing other regions to be separated from each other. Island-like region 2a electrically insulated from
is formed. Island-like regions where transistors and diodes are formed are formed in other regions of the semiconductor substrate. A thermal oxide film 4 is deposited on the main surface of the semiconductor substrate, and a conductive doped polysilicon layer 5 is deposited on the main surface of the thermal oxide film 4 above the island region 2a, forming one side of the capacitor. electrodes are formed.

An oxide film 6 is formed on the main surface of the doped polysilicon layer 5 to a thickness that does not cause dielectric breakdown due to thermal oxidation treatment, thereby forming a dielectric layer of the capacitor. A foil film layer 7 of metal such as aluminum is formed on the main surface of the oxide film 6.
is deposited to form the other electrode of the capacitor,
A wiring 7a is attached from the electrode to the surface of the polysilicon layer 5a and connected to other circuit elements. On the other hand, an opening 9 is formed at the edge of the thermal oxide film covering the main surface of the doped polysilicon layer 5, and a foil film of metal such as aluminum is formed on the doped polysilicon layer 5 exposed from the opening 9. layer is applied. This metal layer 8 extends over 1 m 5 a of polysilicon whose main surface is oxidized and is connected to a wiring layer 8a.

FIG. 2 is a plan view of the capacitor shown in FIG. 1, viewed from the main surface. As shown in FIG. 2, the capacitor is formed in an island region 2a, and a doped polysilicon layer 5, which is one electrode of the capacitor, is deposited in this region. An insulating film is formed on the doped polysilicon layer 5,
A foil film layer 7 is formed on its main surface as the other electrode of the capacitor. The wiring 8 attached to the doped polysilicon layer N5 is attached to the doped polysilicon layer 5 through a stitch-shaped opening in the insulating film 6.

In the embodiment shown in FIG. 2, the openings 9 are provided in a stitched manner, but this is done in order to increase the adhesive strength between the metal foil film 8 and the doped polysilicon layer 5, and also to increase the adhesive strength between the metal foil film 8 and the doped polysilicon layer 5. In order to prevent the impurity elements from being dissipated to the outside by heating the semiconductor element or being dissipated over time, the openings are provided in a stitched manner to minimize them. However, it goes without saying that the capacitor can be formed without providing it in a stitched manner. Furthermore, it goes without saying that the invention is not limited to the embodiment shown in FIG. 2, and that stitch-like openings may be provided all around the doped silicon layer 5.

Next, a method for manufacturing a capacitor according to the present invention will be explained based on FIG.

An N-type epitaxial layer 2 is vapor-phase grown on a P-type semiconductor substrate 1 to form a semiconductor substrate, and a P-type impurity element is diffused from the main surface of the epitaxial layer 2 using the oxide film as a mask to form an island region 2a. is formed, and at the same time a relatively thick thermal oxide film 4 of about 6,000 thick is formed on the main surface of the semiconductor substrate. After performing a transistor or diode diffusion process on other island-like regions of the semiconductor substrate other than the island-like region 2a, a vapor phase growth (CVD) process is started to form a polysilicon layer on the front surface to be used as wiring for transistors, etc. . The polysilicon layer is formed to a thickness of 3000 to 4000 nm. Subsequently, impurities are selectively thermally diffused into the polysilicon layer on the main surface of the oxide film 4 covering the island region 2a where the capacitor is formed to form a doped polysilicon layer 5, and at the same time, impurities are diffused onto the main surface of the polysilicon layer. Form an oxide film. Thereafter, unnecessary portions of the polysilicon layer are removed by etching. The thickness of this doped polysilicon layer 5 is 200 mm.
The thickness of the oxide film formed on the main surface of the polysilicon layer is approximately 1000 μm thick. Furthermore, an etching process is started in which the oxide film formed on the main surface of the doped polysilicon layer 5 is etched to form an opening 9. At the edge of the oxide film formed on the main surface of the polysilicon layer, a stitch-shaped opening 9 exposing the doped polysilicon layer 5 is formed by an etching process, and an oxide film 6 is formed. Next, at the same time as the wiring of transistors and diodes formed in other regions by vapor-depositing a conductor such as aluminum, one electrode 7 of the capacitor, its wiring 7a, and the wiring 8, 8a of the other electrode are etched. formed by

The capacitor of the present invention is composed of a doped polysilicon layer 5 and a metal foil film 7 whose electrodes face each other, and a dielectric layer consisting of an oxide film 6 interposed between these electrodes, as shown in FIG. If shown as an equivalent circuit, this capacitor C
A capacitance of is generated between the input terminal IN and the output terminal OUT.

A parasitic capacitance CI consisting of a doped polysilicon layer 5 and an insulating film 4 interposed between the N-type epitaxial layer 2 in the island-like region between the output terminal OUT and the ground, and the epitaxial layer 2 and P
The type semiconductor substrate 1 and the parasitic capacitance C2 are connected in series. In the capacitor of the present invention, since the parasitic capacitances C1 and C02 are connected in series, their combined capacitance is extremely small.

〔effect〕

The capacitor of the present invention has a structure in which parasitic capacitance is generated in series, and the combined capacitance of these parasitic capacitances is extremely small, so it is extremely easy to use as a capacitor for semiconductor integrated circuits, and is suitable for high frequency capacitors, etc. It has the advantage that it can be used in a wide range of applications.

Further, since the capacitor of the present invention does not use a semiconductor diffusion layer having a relatively large sheet resistance unlike conventional capacitors, the series resistance of the capacitor can be reduced.

Furthermore, since the wiring with the doped polysilicon layer is in contact with the doped silicon layer through the stitch-shaped opening, the adhesive strength with the metal foil film layer is increased, and the doped There is an advantage that there is little possibility that impurities in the trisilicon layer will be dissipated in other manufacturing processes.

Thermal theory: The capacitor of the present invention has a simple structure and can be manufactured through a simple process.

Moreover, since it can be formed extremely easily using a conventional semiconductor manufacturing process using silicon gates, it has high practical value and is extremely effective.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing one embodiment of a capacitor formed in a semiconductor device according to the present invention, FIG. 2 is a plan view of the capacitor, and FIG. 3 is an equivalent circuit diagram of the capacitor of the present invention. , FIG. 4 is a cross-sectional view of a conventional capacitor, and FIG. 5 is a cross-sectional view of a conventional capacitor.
The figure is an equivalent circuit diagram of a conventional capacitor. 1 two-handed conductor substrate, 2: epitaxial growth layer, 2a: island-like region, 3: isolation layer, 4 dioxide film, 5 Ni-but-polysilicon layer, 5a: polysilicon layer, 6: oxide film (dielectric layer), 7 , 8: Metal foil film (electrode), 7a, 8a: Wiring, 9: Opening, C: Capacitance, C1, C2: Parasitic capacitance

Claims (3)

[Claims] (1) In a capacitor formed in a semiconductor device, an island-like region separated from other regions by forming a separation diffusion layer reaching the semiconductor substrate from the main surface of the semiconductor substrate on which an epitaxial layer is formed; a conductive doped polysilicon layer provided on the main surface of the first oxide film covering the upper part of the island region; and the doped polysilicon layer formed by oxidizing the main surface of the doped polysilicon layer. a second oxide film having an opening through which the main surface of the layer is exposed; a conductive metal foil film layer formed on the main surface of the second oxide film; and the dope exposed at the opening. A capacitor formed in a semiconductor device characterized by comprising a wiring layer of a metal foil film adhered to a polysilicon layer. (2) In a capacitor formed in a semiconductor device, an island region separated from other regions by forming a separation diffusion layer reaching the semiconductor substrate from the main surface of the semiconductor substrate on which an epitaxial layer is formed; A conductive doped polysilicon layer, which is one electrode of the capacitor, is provided on the main surface of the first oxide film covering the upper part of the island region, and the main surface of the doped polysilicon layer is oxidized. a second oxide film formed, a stitch-shaped opening opening at the edge of the second oxide film exposing the doped polysilicon layer, and a second oxide film formed on the main surface of the second oxide film. A semiconductor comprising a conductive metal foil film layer which is the other electrode of the capacitor, and a metal foil film wiring layer deposited on the doped polysilicon layer exposed in the opening. Capacitor formed in the device. (3) A comparison between a diffusion process of forming an island region by forming a diffusion layer of the first conductivity type on a semiconductor substrate in which an epitaxial layer of the second conductivity type is formed on the semiconductor substrate of the first conductivity type, and the semiconductor substrate of the first conductivity type. a thermal oxidation treatment step for forming a first oxide film with a large thickness; a vapor phase growth step for forming a polysilicon layer on the main surface of the first oxide film on which the island region is formed; A thermal diffusion process for forming a doped polysilicon layer by diffusing impurities from the main surface; a thermal oxidation process for forming an oxide film on the doped polysilicon layer following the thermal diffusion process; An etching step for exposing the doped polysilicon layer by forming a stitch-like opening at the periphery of the oxide film formed on the main surface of the silicon layer, and a metal foil film on the main surface of the semiconductor substrate subjected to the above treatment. One electrode of the capacitor is attached to the main surface of the oxide film formed on the doped polysilicon layer by etching the metal foil film, and the metal foil film is etched to form an oxide film on the main surface of the doped polysilicon layer. A method for manufacturing a capacitor, comprising an etching step for forming the other deposited electrode of the capacitor and wiring for the electrode.