JPH0226780B2 - - Google Patents
Info
- Publication number
- JPH0226780B2 JPH0226780B2 JP57142933A JP14293382A JPH0226780B2 JP H0226780 B2 JPH0226780 B2 JP H0226780B2 JP 57142933 A JP57142933 A JP 57142933A JP 14293382 A JP14293382 A JP 14293382A JP H0226780 B2 JPH0226780 B2 JP H0226780B2
- Authority
- JP
- Japan
- Prior art keywords
- forming
- electrode
- plating
- barrier film
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910000679 solder Inorganic materials 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 21
- 238000007747 plating Methods 0.000 claims description 18
- 230000004888 barrier function Effects 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 229910001120 nichrome Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000007788 liquid Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明はフエースダウンボンデイングなどに使
用されるはんだバンプ付半導体装置のはんだバン
プ形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming solder bumps on a semiconductor device with solder bumps used in face-down bonding and the like.
従来より、めつきによるはんだバンプの形成に
おいては、金バンプと異なり、はんだが種々の薬
品に侵される性質を有する点から、金バンプの形
成方法のように、バリヤ皮膜、導電金属膜形成後
電極以外の部分にめつきレジストを形成し、めつ
きにてはんだバンプ形成後、レジスト除去、導電
金属膜、バリヤ皮膜をエツチング除去する方法
（第１図参照）はバリヤ皮膜エツチングの際、エ
ツチング液によりはんだが侵され、バンプ形成が
出来ないという問題があつた。このため、めつき
によるはんだバンプ形成においては、鉛が酸など
の薬品に比較的強く、エツチング液にも侵されに
くい点を利用して、スズめつき、鉛めつきという
二層めつきを行なつて、バリヤ皮膜除去後、熱に
より二層を合金化する方法などが行なわれていた
が、これらは工程が長くなる、複雑になるなどの
種々の欠点があり、また二種類のめつき液、めつ
き設備が必要になるなど、費用のかさむ欠点もあ
つた。 Conventionally, when forming solder bumps by plating, unlike gold bumps, solder has the property of being attacked by various chemicals. The method of forming a plating resist on other parts, forming solder bumps by plating, and then removing the resist, conductive metal film, and barrier film by etching (see Figure 1) is to use an etching solution when etching the barrier film. There was a problem that the solder was corroded and bump formation was not possible. For this reason, when forming solder bumps by plating, two-layer plating called tin plating and lead plating is performed, taking advantage of the fact that lead is relatively resistant to chemicals such as acids and is not easily attacked by etching solutions. In recent years, methods have been used in which the two layers are alloyed using heat after removing the barrier film, but these methods have various drawbacks such as the process being longer and more complicated, and they also require the use of two types of plating solutions. However, it also had the disadvantage of increasing costs, such as the need for plating equipment.
本発明は上記のような欠点を除去し、工程が簡
単でかつ一種のめつき液、めつき設備を使用する
はんだバンプの形成方法を提供することを目的と
する。 SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for forming solder bumps that eliminates the above-mentioned drawbacks, has a simple process, and uses a type of plating solution and plating equipment.
本発明の特徴とする所は、はんだバンプ形成後
には、除去が困難なバリヤ皮膜をバンプ形成前に
電極状に形成し、バンプ形成を行なう点にある。 A feature of the present invention is that after the solder bumps are formed, a barrier film that is difficult to remove is formed in the shape of an electrode before the bumps are formed.
以下、実施例により本発明を詳細に説明する。 Hereinafter, the present invention will be explained in detail with reference to Examples.
第２図１に示すように、半導体装置電極部の断
面はアルミ電極とアルミ電極外には配線保護膜が
形成されている。これにバリヤ皮膜を電極状に形
成する。（第２図２）この方法としては、蒸着、
スパツタなどにより全面にバリヤ皮膜形成後、フ
オトエツチング法により電極状パターンを形成す
る方法、電極部以外にレジスト形成した後、バリ
ヤ皮膜を全面に形成し、リフトオフにより電極状
パターンを形成する方法、メタルマスク蒸着によ
り、電極状パターンを形成する方法などが使用さ
れる。 As shown in FIG. 2, the cross section of the electrode portion of the semiconductor device includes aluminum electrodes and a wiring protection film formed outside the aluminum electrodes. A barrier film is formed on this in the form of an electrode. (Figure 2 2) This method includes vapor deposition,
A method in which a barrier film is formed on the entire surface by sputtering, etc., and then an electrode-like pattern is formed by photoetching. A method in which a resist is formed on areas other than the electrodes, a barrier film is formed on the entire surface, and an electrode-like pattern is formed by lift-off.Metal A method of forming an electrode-like pattern by mask vapor deposition is used.
バリヤ皮膜材質としては、クロム、ニクロム、
モリブデンなどを使用する。 Barrier film materials include chromium, nichrome,
Use molybdenum etc.
次に、ウエハ全面にめつき性の良い導電金属膜
を形成し、さらにめつきレジストとしてフオトレ
ジストにより電極部以外をコートする。（第２図
３）
ここで、導電金属膜としては、めつき性が良く
かつ導電金属膜除去の際、そのエツチング液がは
んだを侵しにくい、銅、ニツケル、金などを使用
する。またフオトレジストとしては、レジスト除
去の際、レジストはくり液がはんだを侵しにくい
ポジ系レジストを使用することが好ましい。 Next, a conductive metal film with good plating properties is formed on the entire surface of the wafer, and areas other than the electrode portions are further coated with photoresist as a plating resist. (FIG. 2 and 3) Here, as the conductive metal film, copper, nickel, gold, or the like is used, which has good plating properties and whose etching solution does not easily attack solder when removing the conductive metal film. Further, as the photoresist, it is preferable to use a positive type resist that does not allow the resist removal solution to easily attack the solder when removing the resist.
次に、はんだめつき液を使用して電極部にはん
だバンプを形成する。（第２図４）
なお場合によつては、はんだめつき前に銅、ニ
ツケルなどの高融点金属バンプを形成した後、は
んだバンプが形成される。 Next, solder bumps are formed on the electrode portions using a soldering solution. (FIG. 2 and 4) In some cases, solder bumps are formed after bumps of a high melting point metal such as copper or nickel are formed before soldering.
最後に、レジスト除去を行ないはんだバンプを
マスクにして、導電金属膜をエツチングしてはん
だバンプを完成させる。（第２図５）
以上のようにして形成されたはんだバンプは、
バンプ形状、強度も問題なく、またはんだが侵さ
れて、バンプ形成が出来ないなどの不良もみられ
ず、品質上満足なものであつた。 Finally, the resist is removed and the conductive metal film is etched using the solder bump as a mask to complete the solder bump. (Fig. 2 5) The solder bumps formed as described above are
There were no problems with the bump shape or strength, and there were no defects such as the inability to form bumps due to corrosion of the solder, and the quality was satisfactory.
また、このはんだバンプは、ボンデイング性、
ボンデイング強度などの実装上の品質においても
満足すべきものであつた。 This solder bump also has bonding properties,
The mounting quality, such as bonding strength, was also satisfactory.
以上述べてきたように本発明によれば、クロ
ム、ニクロム、モリブデンなどのそのエツチング
液がはんだを侵しやすいバリヤ膜を電極形状と
し、銅、ニツケル、金などのそのエツチング液が
はんだを侵しにくく、めつき性の良い金属を導電
用金面膜とした単純な複合構造とすることによ
り、従来困難だつた電気めつきによるはんだバン
プの形成が簡素化された工程で可能になつたもの
である。 As described above, according to the present invention, the barrier film, which is easily attacked by the solder by the etching liquid such as chromium, nichrome, or molybdenum, is formed into an electrode shape, and the barrier film, which is easily attacked by the etching liquid such as copper, nickel, or gold, is difficult to attack the solder. By creating a simple composite structure using a metal with good plating properties as a conductive gold film, it has become possible to form solder bumps by electroplating, which was difficult in the past, through a simplified process.
第１図は一バンプの形成方法、第２図は本発明
のはんだバンプ形成方法の実施例を示す工程断面
図である。
１……アルミ電極、２……配線保護膜、３……
バリヤ皮膜、４……導電金属膜、５……レジス
ト、６……バンプ。
FIG. 1 is a process sectional view showing a method for forming one bump, and FIG. 2 is a process sectional view showing an embodiment of the method for forming a solder bump of the present invention. 1... Aluminum electrode, 2... Wiring protective film, 3...
Barrier film, 4... Conductive metal film, 5... Resist, 6... Bump.
Claims (1)
の形成方法において、アルミ電極上にクロム、ニ
クロム、モリブデンなどのバリヤ皮膜電極を形成
する工程、上記電極を含む半導体ウエハ全面に
銅、ニツケル、金などのめつき性の良い導電金属
膜を形成し、電極以外の部分にめつきレジストを
形成する工程、上記電極部にめつきによりはんだ
バンプを形成する工程、上記の処理を行なつたウ
エハをレジスト除去後、エツチングにより上記導
電金属膜を除去する工程よりなるはんだバンプの
形成方法。1. In the method of forming solder bumps on aluminum electrodes of semiconductor devices, there is a step of forming a barrier film electrode of chromium, nichrome, molybdenum, etc. on the aluminum electrode, and a step of forming a barrier film electrode of chromium, nichrome, molybdenum, etc. on the aluminum electrode, and a step of forming a barrier film electrode of copper, nickel, gold, etc. A process of forming a conductive metal film with good plating properties and forming a plating resist on parts other than the electrodes, a process of forming solder bumps by plating on the electrode parts, and a process of removing the resist from the wafer that has undergone the above processing. A method for forming a solder bump, which comprises the step of removing the conductive metal film by etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57142933A JPS5932154A (en) | 1982-08-18 | 1982-08-18 | Forming method for solder bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57142933A JPS5932154A (en) | 1982-08-18 | 1982-08-18 | Forming method for solder bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5932154A JPS5932154A (en) | 1984-02-21 |
| JPH0226780B2 true JPH0226780B2 (en) | 1990-06-12 |
Family
ID=15327015
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57142933A Granted JPS5932154A (en) | 1982-08-18 | 1982-08-18 | Forming method for solder bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5932154A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6226544U (en) * | 1985-07-30 | 1987-02-18 | ||
| JPH0290622A (en) * | 1988-09-28 | 1990-03-30 | Seiko Instr Inc | Gold bump forming method |
| US5266522A (en) * | 1991-04-10 | 1993-11-30 | International Business Machines Corporation | Structure and method for corrosion and stress-resistant interconnecting metallurgy |
| US5175609A (en) * | 1991-04-10 | 1992-12-29 | International Business Machines Corporation | Structure and method for corrosion and stress-resistant interconnecting metallurgy |
| US5384283A (en) * | 1993-12-10 | 1995-01-24 | International Business Machines Corporation | Resist protection of ball limiting metal during etch process |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5224466A (en) * | 1975-08-20 | 1977-02-23 | Matsushita Electric Ind Co Ltd | Semiconductor electrode formation method |
| JPS52102670A (en) * | 1976-02-25 | 1977-08-29 | Hitachi Ltd | Formation of extruding electrode in semiconductor device |
| JPS5469382A (en) * | 1977-11-14 | 1979-06-04 | Nec Corp | Production of semiconductor device |
-
1982
- 1982-08-18 JP JP57142933A patent/JPS5932154A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5224466A (en) * | 1975-08-20 | 1977-02-23 | Matsushita Electric Ind Co Ltd | Semiconductor electrode formation method |
| JPS52102670A (en) * | 1976-02-25 | 1977-08-29 | Hitachi Ltd | Formation of extruding electrode in semiconductor device |
| JPS5469382A (en) * | 1977-11-14 | 1979-06-04 | Nec Corp | Production of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5932154A (en) | 1984-02-21 |
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