JPH0945691A - Solder bump for chip component and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solder bump in which the contact area of a first bump with a second bump is made large and in which their exfoliation at the boundary face between both is prevented by a method wherein the second bump is formed in such a way that the surface of a large-diameter pillar-shaped part and the circumferential face and the surface of a small-diameter pillar-shaped part are covered with a solder material whose melting point is lower than that of a solder material for the first bump. SOLUTION: A diffusion-preventing metal film 5 is formed on a carene film 4 formed on an electrode pad 2 while the carene film is used as an electrode for electrolytic plating. A first bump 10 which is formed in a prescribed height on the diffusion-preventing metal film 5 is composed of a cylindrical large-diameter pillar-shaped part 10b and of a small- diameter pillar-shaped part 10a which is formed on the surface of the large-diameter pillar- shaped part 10b in a diameter which is smaller than that of the large-diameter pillar-shaped part 10b, and both pillar-shaped parts 10a, 10b are formed of the same solder material whose melting point is high. A second bump 11 which is formed in the same diameter as the large- diameter pillar-shaped part 10b so as to cover the surface of the large-diameter pillar-shaped part 10b at the first bump 10 and the circumferential face and the surface of the small- diameter pillar-shaped part 10a is formed of a solder material whose melting point is lower than that of the first bump 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bump made of solder, which is formed on a chip component such as an LSI, for mounting it on a substrate, and a method for manufacturing the bump.

[0002]

2. Description of the Related Art Among electronic components mounted on a substrate, there is a chip component such as an LSI that is mounted while maintaining a certain height from the surface of the substrate. In such a chip component, the above height can be guaranteed. It is required to form bumps using solder as a material. FIG. 5 is a side sectional view showing a conventional example of this type of solder bump for chip parts.

In the figure, 1 is a chip part, 2 is an electrode pad provided on the chip part 1, 3 is a conductor formed on the chip part 1 so as to be connected to the electrode pad 2, 4
Is a current film made of aluminum or the like formed on the electrode pad 2, and 5 is a diffusion prevention metal film made of copper or the like formed on the current film 4 as an electrode layer for electrolytic plating. A first bump 6 made of a solder material having a high melting point is formed into a cylindrical shape by electrolytic plating or the like so as to have a predetermined height, and a first bump made of a solder material having a lower melting point is formed on the first bump 6. The second bump 7 is formed so as to have a columnar shape having the same diameter and a height lower than that of the first bump 6.

FIG. 6 is a side sectional view showing a step of mounting a chip component on a substrate according to the conventional example having the above-mentioned structure.
When the chip component 1 is mounted on the substrate 8 as shown in this figure, the bumps 9 are formed on the substrate 8 by the same material as the second bumps 7 as shown in FIG. After the second bumps 7 of the chip component 1 are placed on the bumps 9 to align the chip component 1 and the substrate 8, the whole is heated for a certain period of time by reflow.

The heating temperature by the reflow at this time is such that the second bumps 7 and 9 are melted and the first bumps 6 are melted.
Is a temperature that does not cause deformation,
As shown in (b), only the second bump 7 and the bump 9 are melted and integrated, so that when they are cooled and hardened, the chip component 1 is electrically connected to the substrate 8 and mounted. Since the first bump 6 is kept in the state and the columnar shape of the first bump 6 is maintained, the height of the chip component 1 with respect to the substrate surface is guaranteed by the first bump 6.

[0006]

However, in the above-mentioned conventional technique, since the columnar second bump having the same diameter as that of the columnar first bump is simply formed in two layers on the first columnar bump, There is a problem that the contact area between the first bump and the second bump is small, so that peeling easily occurs at the boundary surface between the two bumps.

[0007]

In order to solve such a problem, the present invention provides a large diameter columnar portion formed of a solder material on an electrode pad of a chip component mounted on a substrate, and the large diameter columnar portion. And a small-diameter columnar portion formed on the large-diameter columnar portion with a diameter smaller than the large-diameter columnar portion by the same solder material as that of the first bump, and a first bump for ensuring the height of the chip component with respect to the substrate. , A solder material having a melting point lower than that of the solder material of the first bump so as to have the same diameter as the large-diameter columnar portion so as to cover the peripheral surface and the upper surface of the large-diameter columnar portion from the upper surface of the large-diameter columnar portion. And a second bump which is melted by heating when the chip component is mounted on the substrate to connect the chip component and the substrate.

[0008]

According to the present invention having such a structure, the upper surface of the large-diameter columnar portion is made to have the same diameter as the large-diameter columnar portion of the first bump by the solder material having a lower melting point than the solder material of the first bump. Since the second bumps are formed so as to cover the peripheral surface and the upper surface of the small-diameter columnar portion, the contact area between the first bumps and the second bumps can be increased, and at the boundary surface between them, Can be prevented.

[0009]

An embodiment will be described below with reference to the drawings. FIG. 1 is a side sectional view showing an embodiment of a solder bump for a chip component according to the present invention. In the figure, 1 is a chip component, 2
Is an electrode pad provided on the chip component 1, 3 is a conductor formed on the chip component 1 so as to be connected to the electrode pad 2, 4 is a current film made of aluminum or the like formed on the electrode pad 2, 5 Is a diffusion preventing metal film formed of copper or the like on the current film 4 as an electrode layer for electrolytic plating, and these are the same as conventional ones.

Reference numeral 10 is a first bump formed on the diffusion preventing metal film 5 at a predetermined height.
Is a columnar large-diameter columnar portion 10a and this large-diameter columnar portion 10a.
The small-diameter columnar portion 10b is formed on the upper surface of a with a diameter smaller than the large-diameter columnar portion 10a.
b is formed of the same solder material having a high melting point. 11
Is a second bump formed to have the same diameter as that of the large-diameter columnar portion 10a so as to cover the upper surface of the large-diameter columnar portion 10a of the first bump 10 and the entire peripheral surface and the entire upper surface of the small-diameter columnar portion 10b. The bumps 11 are formed of solder having a melting point lower than that of the first bumps 10.

Next, a method of manufacturing a solder bump for a chip component having the above structure will be described. Figure 2 (a) ~
3 (e) and 3 (f) to 3 (j) are side cross-sectional views showing the manufacturing process of the solder bump for a chip component, and FIGS. 2 and 3 show a series of processes. Although only one chip component is shown in both figures, the following bumps are manufactured using a wafer integrally formed with a plurality of chip components.

First, as shown in FIG. 2A, a plurality of electrode pads 2 are provided for each chip component 1 and a conductor 3 is provided.
The current film 4 is formed on the formed wafer by vapor deposition or sputtering. The material of the current film 4 is a metal that has good adhesion to the electrode pad 2,
For example, aluminum or the like is used.

Next, a resist is applied on the current film 4 to a thickness of about 30 μm, and the resist is applied by a photolithography technique to the structure shown in FIG.
As shown in (b), the first electrode has holes on the electrode pad 2.
A resist pattern 12 is formed. Next, using the first resist pattern 12 as a plating mask, a diffusion preventing metal 5 is formed on the current film 4 exposed on the electrode pad 2 by electrolytic plating as shown in FIG. 2C.

As a material of the diffusion preventing metal 5, for example, copper is used. Subsequently, a sulfonic acid-based Pb—Sn alloy solder material having a high Pb (Pb): Sn (tin) alloy composition and a high melting point, for example, Pb80 wt%-
Sn 20 wt%, liquidus line 279 ° C., solidus line 183 ° C. alloy solder material is melted, the diffusion resisting metal 5 is immersed in this alloy solder material using the first resist pattern 12 as a plating mask, and the current film 4 for electrolytic plating The electrode layer is formed on the diffusion preventing metal 5 by electrolytic plating or the like as shown in FIG.
As shown in (d), the large diameter columnar portion 1 of the first bump 10 is formed.
0a is formed in a cylindrical shape.

Next, a resist is applied on the large-diameter columnar portion 10a and the first resist pattern 12, and the large-diameter columnar portion 10a is formed on the large-diameter columnar portion 10a by the photolithography technique as shown in FIG. 2 (e). Second having a hole having a smaller diameter than the portion 10a
A resist pattern 13 of is formed. And this second
As shown in FIG. 3 (f), the small-diameter columnar portion 10b is cylindrically formed on the large-diameter columnar portion 10a using the same material as the solder material of the large-diameter columnar portion 10a by using the resist pattern 13 of FIG. To form.

After that, as shown in FIG.
The second resist patterns 12 and 13 are all cleaned by cleaning with an organic solvent such as acetone. Next, a resist is applied to the current film 4 and the first bumps 10 so as to be higher than the small-diameter columnar portions 10b, and the large-diameter columnar portions 10a are formed on the first bumps 10 by photolithography.
A third resist pattern 14 having holes of the same diameter as in FIG.
It is formed as shown in (h).

Then, using the third resist pattern 14 as a plating mask, a solder material having a melting point lower than that of the first bump 10, for example, an alloy solder material having a eutectic composition of Pb 37 wt%, Sn 63 wt%, and a melting point of 183 ° C. is electrolyzed. As shown in FIG. 3 (i), the second bump 1 is formed by plating or the like.
Form one. After that, as shown in FIG.
The resist pattern 14 of No. 1 was washed with an organic solvent such as acetone to completely remove it, and after removing unnecessary portions of the current film 4 by etching, the wafer was divided into individual chips by dicing, as shown in FIG. A chip component 1 having bumps is obtained.

FIG. 4 is a side sectional view showing a step of mounting the chip component on the substrate according to the above-mentioned embodiment. When the chip component 1 is mounted on the substrate 15 as shown in this figure, the second bumps 11 are formed on the substrate 15 as shown in FIG.
A bump 16 is formed of the same material as the above, and the second bump 11 of the chip component 1 is placed on the bump 16,
After the chip component 1 and the substrate 15 are aligned with each other, the whole is heated for a certain time by reflow.

The heating temperature by the reflow at this time is such that the second bump 11 and the bump 16 are melted and the first bump 10 is not deformed. The peak temperature of this heating is about 220 ° C. This is the same figure
As shown in (b), only the second bump 11 and the bump 16 are melted and integrated, and at this time, the melted second bump 11 is pulled toward the bump 16 side.
Since the small-diameter columnar portion 10b of the first bump 10 is present at the center of the first bump 10, the second bump 11 is deformed into a drum shape with the small-diameter columnar portion 10b as a core.
And the contact area of the second bump 11 is kept the same as before heating.

After that, when it is cooled and hardened, the chip component 1 is electrically connected to and mounted on the substrate 15, and the large-diameter columnar portion 10a and the small-diameter columnar portion 10b of the first bump 10 are the original. Therefore, the height of the chip component 1 with respect to the substrate surface is guaranteed by the first bumps 10. In addition, in the above-mentioned embodiment, Pb80w
First formed by a solder material having a composition of t% -Sn 20 wt%
However, the first bump 10 is Pb 95 wt%, Sn 63 wt%, Sn 63 wt%, and the second bump 11 formed of a solder material.
Solder material with a composition of 5 wt% (liquidus line 314 ° C., solidus line 3
The second bump 11 is Pb 37 wt.
%, Sn63 wt% composition of the solder material.

In addition to the Pb-Sn alloy solder, it is possible to use a solder material made of a brazing material capable of alloy plating. Furthermore, in the above-described embodiment, the first bump 1
Although the large-diameter columnar portion 10a and the small-diameter columnar portion 10b forming 0 are cylindrical, respectively, they may be formed in a triangular prism, a quadrangular prism, or a polygonal column.

[0022]

As described above, according to the present invention, the solder material having a melting point lower than that of the solder material of the first bump is used.
Second bump so as to have the same diameter as the large-diameter columnar portion of the bump, and to cover the peripheral surface and the upper surface of the small-diameter columnar portion from the upper surface of the large-diameter columnar portion.
Since the bumps are formed, it is possible to increase the contact area between the first bumps and the second bumps, and thus it is possible to prevent peeling at the boundary surface between the two.

[Brief description of drawings]

FIG. 1 is a side sectional view showing an embodiment of a solder bump for a chip component according to the present invention.

FIG. 2 is a side sectional view showing a manufacturing process of a solder bump for a chip component according to the present invention.

FIG. 3 is a side sectional view showing a manufacturing process of a solder bump for a chip component according to the present invention.

FIG. 4 is a side sectional view showing a step of mounting a chip component on a substrate according to an example.

FIG. 5 is a side sectional view of a conventional example.

FIG. 6 is a side sectional view showing a mounting process of a chip component on a substrate according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Chip component 2 Electrode pad 4 Current film 5 Diffusion prevention metal film 10 First bump 10a Large diameter columnar portion 10b Small diameter columnar portion 11 Second bump 12 First resist pattern 13 Second resist pattern 14 Third resist Pattern 15 Substrate 16 Bump

Claims (4)

[Claims] 1. A large-diameter columnar portion formed of a solder material on an electrode pad of a chip component mounted on a substrate, and a large-diameter columnar portion formed on the large-diameter columnar portion by the same solder material as the large-diameter columnar portion. A first bump configured to include a small-diameter columnar portion formed with a diameter smaller than that of the columnar portion, for ensuring a height of the chip component with respect to the substrate; and a solder material having a melting point lower than that of the solder material of the first bump. It is formed so as to have the same diameter as the large-diameter columnar portion so as to cover the peripheral surface and the upper surface of the large-diameter columnar portion from the upper surface of the large-diameter columnar portion, and is melted by heating when mounting the chip component on the substrate. A solder bump for a chip component, comprising a second bump for connecting the chip component and the substrate. 2. A large-diameter columnar portion is formed by plating a solder material on the electrode pad by using a first resist pattern having a hole located on the electrode pad of the chip component as a plating mask. By using the second resist pattern having a diameter smaller than the diameter of the large diameter columnar portion and located on the large diameter columnar portion as a plating mask, the same solder material as the solder material is plated on the large diameter columnar portion to reduce the diameter. A columnar portion is formed to form a first bump composed of the large-diameter columnar portion and the small-diameter columnar portion, and is higher than the first bump after removing the first resist pattern and the second resist pattern. The solder material is used to cover the peripheral surface and the upper surface of the small-diameter columnar portion from the upper surface of the large-diameter columnar portion using a third resist pattern having a hole having the same shape as the large-diameter columnar portion as a plating mask. Method of manufacturing a chip component for solder bumps and forming the second bump by plating a low melting point solder material. 3. The solder bump for a chip component according to claim 1 and the manufacturing method according to claim 2, wherein the composition of the solder material forming the first solder bump is lead 95.
%, Tin 5%, and the composition of the solder material forming the second solder bump is lead 37% tin 63%, and a solder bump for a chip part, and a method for manufacturing the same. 4. The solder bump for a chip component according to claim 1 and the manufacturing method according to claim 2, wherein the composition of the solder material forming the first solder bump is lead 80.
%, Tin 20%, and the composition of the solder material forming the second solder bump is lead 37% tin 63%, and a solder bump for a chip component, and a method for manufacturing the same.