JPH0226076A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to store and hold an optical signal as an electric signal by combination of a photodiode and a semiconductor storage device which is a combination of a volatile semiconductor memory and a nonvolatile semiconductor memory. CONSTITUTION:A MOS transistor MT2 constitutes an EEPROM as a nonvolatile semiconductor memory with a floating gate 6 established below a usual control gate G2. A MOS transistor MT3 is a mode switching one to switch the nonvolatile semiconductor memory to make it work as an EEPROM or a volatile semiconductor memory DRAM. Voltage is applied from a terminal 7 to the gate G3 and the gate G2 of the MOS transistor MT2. Between a diffusion layer (N layer) 4 and a P-type Si substrate 8, a P-N junction photodiode PD is formed. With an optical signal applied to the photodiode PD to be converted into an electric signal, the data on the signal are sent to the EEPROM to be stored. By this method, the data can be stored and held without being backed up by a battery.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a semiconductor device that combines a volatile semiconductor memory device, a nonvolatile semiconductor memory device, and a photodiode.

<Prior Art> A CCD element is a semiconductor device that converts an optical signal into an electrical signal.

In a CCD device, an optical signal is applied to a photodiode matrix, and the charge collected on the diode matrix is transferred by a resistor using a charge-coupled device and appears as a current or voltage pulse at an output terminal.

<Problems to be Solved by the Invention> However, the CCD element described above has a problem in that it cannot store data.

In order to solve the above-mentioned problems, the present invention combines a volatile semiconductor memory device, a non-volatile semiconductor memory device, and a photodiode. By converting optical signals into electrical signals and transferring and storing the data in a non-volatile semiconductor storage device,
The data is memorized even without a battery.
Retained.

<Example> A DRAM is used as an example of a volatile semiconductor memory device, and
A circuit diagram of an embodiment using an EEPROM as an example of a nonvolatile semiconductor memory device and a PN junction formed on a P-type Si substrate as an example of a photodiode is shown in FIG. 1, and a cross-sectional view thereof is shown in FIG. 2. .

EEPROM, DRAM and photodiode are all M
Manufactured using OS technology, it is easy to manufacture and D
RAM has the advantage of requiring the least number of elements for one memory cell.

In FIG. 1, three MOS) transistors MT+, M
T2 and MT3 are formed in series on a semiconductor substrate. In actual memory, a large number of these combinations are arranged, but for convenience, a portion that operates as one unit was selected. A capacitive element C is connected to the middle gate 4 of the MOS transistor MTI and the MOS transistor MTx.
A predetermined voltage is applied from terminal 5. Terminal 1 of the MOS transistor MTI is normally in the n-layer of a semiconductor substrate and is connected to a column line of the memory, and terminal 3 of its gate Gl is connected to a row line of the memory. MOS) Ranjisk MT2 has a floating gate 6 below a normal control gate G2 to constitute an EEPROM.

MOS) Ranjisk MT 3 has this memory as EEF.
Does it operate as ROM or DRAM?
This is a mode switching transistor.

A voltage is applied from the terminal 7 to the gate G3 and the gate G2 of the MOS transistor MT. The terminal 2 of the MOS) transistor M T 3 is the n-layer of the semiconductor substrate. One of the terminals 1 and 2 is on the drain side and the other is on the source side. In the capacitive element C, the channel region of the semiconductor substrate can be used as one electrode, and the polysilicon film provided through the oxide film can be used as the other tlicG.

A PN junction photodiode PD is formed between the diffusion layer (n layer) 4 and the P-type Si substrate 8.

Such a device operates as follows.

(1) Before starting the initial setting operation, apply a positive voltage to terminal 7 and
- Accumulate charge in the floating gate 6 of transistor M T z (the charge at this time is Q).

Before irradiating the photodiode PD with light, positive charges are accumulated in the n-type diffusion layer 4 of the photodiode PD (D
This means that after grounding terminals 5 and 7 and turning off the MOS transistor MT3, TF (voltage V c When c is applied, this transistor is turned on (QC''CCVCC).

(2) Light irradiation to the photodiode When the photodiode PD is irradiated with light, minority carrier electrons generated in the P-type Si substrate 8 gather in the n-type diffusion layer 4, and the holes accumulated in the initial settings are regenerated. (CDRAM data °0# state) where there is no positive charge in the n-type diffusion layer 4).

By irradiating the photodiode with light in the above method, the DRAM data 11'→°'O# is converted, so that the optical signal can be converted into an electrical signal.

FIG. 3 is an equivalent circuit diagram when an optical signal from a photodiode is converted into an electrical signal by a DRAM.

(3) Transfer of data from DRAM to EEPROM FIG. 4 shows an equivalent circuit when the t data stored in the DRAM described above is transferred to the EEPROM.

When a voltage v5 is applied to the terminal 5 with a charge Qc accumulated in the capacitive element C and a charge QP accumulated in the floating gate 6, Ct, (Vp - Va) + Crt Vp - Q p
...---(1)C ((Va Vs) 10C
t, (Va-VP)-Q(,-0,(2) where CC
: Capacitance CL of capacitive element C: Capacitance CH between floating gate 6 and substrate: Capacitance between floating gate 6 and control gate 02 ■4: Potential of terminal 4 V5: Voltage of terminal 5 vF: Potential of floating gate 6 Qc' ftWl accumulated in the capacitive element C, charge QP: charge accumulated in the floating gate 6 (1), From equation (2), the floating gate 6 and,
The voltage V applied to the diffusion layer constituting one electrode of the capacitive element is expressed by the following formula.

v −v, −vP By the way, in the above initial setting, Qp−C■VΔVT u −=゛−゛−”(4
) charges are accumulated.

ΔVTTI: Initial setting is a floating gate (MOS) due to the charge multiplied by 6) Ranjisk M T ! By applying the capacitive element CVcvco, the shift value of the threshold value of Q C
”” cc”cc ・・・・・・・・・・・・
......(5) charges are accumulated.

From equations (3), (4) and (5), the current density Jp injected into the floating gate 6 is:
Determined by the t electric field EOX applied between the floating gate 6 and the diffusion region of the semiconductor substrate, J p = A E□x
``eXp (-B/Eox) ''=・''・(7) A and B are constants.

■EOX”-tOX ・・・・・・・・・・・・(8) Here, tox is the floating gate 6
and the thickness of the thin oxide film between the diffusion regions.

If Eox in the state where the charge QC''CCVCC is accumulated in the capacitive element C and the state in which it is not accumulated (Qc-0) are respectively EOXI and E:OXO, ΔEox=E
oxx-EOX.

It is expressed as

When holes are injected into the floating gate 6 by applying a voltage v5 to the terminal 5 of the TL pole CG of the capacitive element C, if a charge QC=Ccvcc is accumulated in the capacitive element C, no charge is accumulated. Holes are injected with an electric field stronger by ΔEOX shown in equation (9) than the current state.

When the thickness of the thin oxide film for hole injection between the floating gate 6 and the diffusion layer 4 is tox, in the example, tOX-8OA Co -50fF C1l -15,8fF CL -9.2fF Assume that VCC is 5v.

At this time, enter each numerical value into equation (9), Δ]Eo
Find x.

ΔEox-3,54 (MV/fi) If the electric field applied between the floating gate 6 and the diffusion layer 4 is EOXI and EOXO, and the current density flowing through the floating gate 6 is JFIIJFO, J PI / J p o # 10', and the capacity: element CK heavy charge is accumulated (Qo
-C, V, , ) state, no charge is accumulated (Q
, -0) state, a large amount of positive charge is accumulated in the floating gate 6.

In this embodiment, the control gate G2 of the MOS transistor MT is grounded, and the voltage v5 is applied to one current CG of the capacitive element C.
was applied, but one of the elements C, which is 1! The same thing can be done by grounding the pole CG and applying a voltage to the terminal 7.

As described above, by applying a voltage to the terminal 5 or the terminal 7, the data stored in the capacitive element C can be transferred as data stored in the floating gate 6. That is, the optical signal applied to the photodiode can be stored in the EEFROM.

Even when a large number of memory elements with the above configuration are connected,
By applying a voltage to the common terminal 5 or terminal 7,
All the Daikichikari data stored in DRAM -
The data can be transferred to EEPROM at high speed. M
The data in the EEPROM is determined by the magnitude of the current in the channel of the OS transistor MT, or by the change in the gate threshold voltage seen from the control gate G2.

<Effects of the Invention> As described above in detail, according to the present invention, optical signals can be transmitted by combining a semiconductor memory device that is a combination of a volatile semiconductor memory device and a nonvolatile semiconductor memory device, and a photodiode. As an electrical signal, it can be memorized and retained without buffering or backup.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a cross-sectional view of Fig. 1, and Fig. 3 is a circuit diagram of an embodiment of the present invention.
The equivalent circuit diagram when converting into an electrical signal in Figure 4 is D.
FIG. 2 is an equivalent circuit diagram when transferring data from RAM to EEPROM. Code explanation MT, MT! , MT3...MOS transistor, resistor, G□*G2+ G3...control gate, C...capacitive element, PD...photodiode, 4...n-type diffusion layer, 6...floating gate , 8...P type S
i board.

Claims (1)

[Claims] 1. A photodiode, a volatile semiconductor memory device that stores an electrical signal corresponding to an optical signal applied to the photodiode, a nonvolatile semiconductor memory device, and a mode switching means for switching the mode of the semiconductor memory device. , a voltage applying means for transferring data stored in the volatile semiconductor memory device to the nonvolatile semiconductor memory device.