JPH02232947A - Semiconductor integrated circuit device and mounting thereof - Google Patents

Abstract

PURPOSE:To dispense with processes of the formation of an electrode formation film and the like and to perform a simple solder treatment on a wiring by a method wherein a semiconductor integrated circuit device is provided with a plurality of power pads which are used as the input/output terminals of the device, a passivation film, which is provided on the surface of the device and is opened only in the power pads, and lead-out electrodes consisting of a conductive material. CONSTITUTION:A passivation film 16 is opened only in a circuit constituent part of a semiconductor integrated circuit device 12 and electrode pads 14, which are the electrical connecting places of the device 12 with an external wiring board. Lead-out electrodes 18 are provided on the device 12 through these pads 14 toward the vicinities of the outer peripheral ends of the device 12. These electrodes 18 are formed on the pads 14 and the film 16 by depositing copper in a prescribed thickness by a vacuum deposition method using a metal mask. The formation of a metal laminated film, the formation of a solder and the formation process of bump electrodes by solder-fusing are dispensed with, the necessary time for the process of the device 12 is shortened and a simple solder treatment is performed on the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a semiconductor integrated circuit device and a method for mounting a wiring board and a semiconductor integrated circuit device using this semiconductor integrated circuit device.

[Prior art and its issues]

A flip chip method (hereinafter referred to as FC method) is known as one of the methods for mounting a wiring board and a semiconductor integrated circuit device. However, as described in Japanese Patent Publication No. 43-28735, for example, in the FC method, a metal laminated film is placed on the electrode pad that is the electrical connection point between the circuit component part of the semiconductor integrated circuit device and the external wiring board. solder is formed on this metal laminated film by vacuum evaporation using a metal mask, and then the solder must be melted and solidified to form the protruding electrodes, and this process of forming protruding electrodes is complicated. However, there are problems in that the process time required is long and the implementation cost is high.

[Purpose of the invention]

The present invention solves these five problems and provides a semiconductor integrated circuit device structure in which the process of forming connection electrodes in a semiconductor integrated circuit device is simple and the process time required, and a wiring board using this semiconductor integrated circuit device. In order to achieve the above object of providing a simple implementation method, the present invention uses the following means.

(b) A plurality of electrode pads provided as input/output terminals of the semiconductor integrated circuit device, a passivation film provided on the surface of the semiconductor integrated circuit device and opened only on the electrode pads, and a passivation film corresponding to each of the electrode pads and on the electrode pads. The semiconductor integrated circuit device includes an extraction electrode made of a conductive material and provided on the passivation film.

(Explanation) A step of forming a solder resist made of photosensitive resin on the entire surface of a wiring board having a wiring pattern and buttering this solder resist by photolithography;
A step of forming solder on the wiring pattern in the opening of the solder resist, a step of removing the solder resist, and a step of temporarily fixing the semiconductor integrated circuit device by aligning the lead electrodes of the semiconductor integrated circuit device with the solder. The semiconductor integrated circuit device and the wiring board are connected by the step of melting and solidifying the solder by heat treatment.

(c) temporarily fixing the semiconductor integrated circuit device by aligning the wiring pattern on the wiring board with the lead-out electrode of the semiconductor integrated circuit device and providing a gap between the wiring pattern and the lead-out electrode; The semiconductor integrated circuit device and the wiring board are connected by a process of arranging solder along the outer periphery of the semiconductor integrated circuit device and a process of melting and solidifying the solder by heat treatment.

((d) When melting the solder described in (1) or (3) above, ultrasonic waves are applied from the back side of the semiconductor integrated circuit device to the connection portion between the semiconductor integrated circuit device and the wiring board.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

The structure of the semiconductor integrated circuit device according to the present invention is shown in FIG.
) and the plan view of FIG. 1(b).

As shown in FIGS. 1(a) and 1(b), a passivation film 1 is formed only on the electrode pad 14, which is the electrical connection point between the circuit component of semiconductor integrated circuit device #120 and an external wiring board.
Open 6. Furthermore, the lead electrode 1 extends from the electrode pad 14 toward the vicinity of the outer peripheral edge of the semiconductor integrated circuit device 12.
8.

The extraction electrode 18 is formed by forming a copper film with a thickness of 2 μm to 3 μm on the electrode pad 14 and the vacuum film 16 by vacuum evaporation using a metal mask.

Here, the extraction electrodes were formed using a vacuum evaporation method using a metal mask, but a sputtering method using a metal mask, or a plating resist made of photosensitive resin after forming a common electrode film on the entire surface of the semiconductor integrated circuit device. There is also a method of forming a common electrode film, patterning a plating resist by photolithography, forming copper by electrolytic plating, and removing the common electrode film by etching. Another method is to form a copper film over the entire surface of a semiconductor integrated circuit device by vacuum evaporation, sputtering, or plating, and then form lead-out electrodes by photolithography and etching.

Furthermore, the material for the lead electrode of the semiconductor integrated circuit device may be any conductive material other than copper, such as gold, which has high wettability with solder. Furthermore, when connecting a semiconductor integrated circuit device and a wiring board, when applying ultrasonic waves during solder melting as described later, the material for the extraction electrodes generally has low wettability to solder, such as aluminum. It can also be metal or other conductive material. Furthermore, the form of the semiconductor integrated circuit device at the time of forming the extraction electrodes may be in either a chip state or a wafer state, but in consideration of convenience in handling and the number of processes per unit time, the wafer state is more advantageous. After forming the lead electrodes in a wafer state, it is preferable to divide the wafer into chips by dicing.

Note that in FIGS. 1A and 1B, the electrode pads 14 are arranged on the outer periphery of the semiconductor integrated circuit device 12, and the extraction electrodes 18 are formed only on the outer periphery of the semiconductor integrated circuit device 12. , it is also possible to form it in a region other than the outer periphery of the semiconductor integrated circuit device depending on the arrangement of the electrode pads.

A first embodiment of a mounting method using a semiconductor integrated circuit device of the present invention will be described with reference to cross-sectional views of FIGS. 2(a) to 2(e).

First, as shown in FIG. 2(a), a sheet-shaped solder resist 24 made of a photosensitive resin and having a thickness of about 50 μm is applied to the entire surface of the wiring pattern 26 formed on the surface of the wiring board 22, and then photolithography is performed. Only the connection portion with the semiconductor integrated circuit device is opened.

Next, as shown in FIG. 2(b), a wiring pattern 2 is formed using a solder dipping method in which the wiring pattern is immersed in molten solder to form solder.
Solder 28 is formed on the connection portion with the semiconductor integrated circuit device on 6.

Next, as shown in FIG. 2(C), the solder resist 24 is removed at step 5.

Next, as shown in FIG. 2(d), the semiconductor integrated circuit device 12 on which the extraction electrodes 18 described with reference to FIG. do.

Thereafter, the solder 28 is heated using hot air to melt and solidify the wiring pattern 26 of the wiring board 22 and the semiconductor integrated circuit device 12.
By joining the extraction electrode 18 of FIG.
As shown in e), the semiconductor integrated circuit device 12 is mechanically and electrically connected to the wiring board 22 at 5K.

In the first embodiment of the mounting method described using FIG. 2, the solder dipping method was used as a method for forming the solder 28, but the solder dipping method is used to deposit solder by immersing it in a solder plating bath and causing an oxidation-reduction reaction. It can also be formed by the law. Alternatively, the solder paste may be formed on the wiring board 22 by screen printing. If this solder paste is used, the adhesiveness of the solder paste will hold the semiconductor integrated circuit device 12 when the semiconductor integrated circuit device 12 is temporarily fixed. 5. The adhesive 30 is no longer necessary.

Regarding the heating method, in addition to hot air, infrared heating method, laser heating method, etc. can also be used to similarly melt the solder 28 and perform the connection.

A second embodiment of the mounting method using the semiconductor integrated circuit device of the present invention will be described using cross-sectional views of FIGS. 3(a) to 3(C).

First, as shown in FIG. 3(a), a semiconductor integrated circuit device 12 on which the extraction electrode 18 described using FIG. 1 is formed is shown.
are temporarily fixed using an adhesive 30 at a predetermined position on the wiring board 22 on which the wiring pattern 26 is formed, with a gap of about 30 μm to 40 μm.

Next, as shown in FIG. 3(b), a five-shaped solder 28 is placed on the wiring board 22 along the outer periphery of the semiconductor integrated circuit device 12.
Place.

Thereafter, the solder is heated using hot air to melt and solidify the solder. Here, the passivation film 16 on the semiconductor integrated circuit device 12 and the insulating portion of the wiring board 22 shown in FIG. Solder adheres only to the lead-out electrode 18 and the wiring pattern 26 on the wiring board 22,
The semiconductor integrated circuit device 12 is mechanically and electrically connected onto the wiring board 22 as shown in FIG. 3(C) without causing a short circuit between the wirings. Here, since the extraction electrode 18 is formed up to the vicinity of the outer periphery of the semiconductor integrated circuit device 12, if the solder 28 is placed along the outer periphery of the semiconductor integrated circuit device 12, the wiring pattern 28 on the wiring board 22
and the extraction electrode 18 are connected by melting and solidifying the solder 28.

In the second embodiment of the mounting method explained using FIG. 3, hot air was used as a heating method, but infrared heating method, laser heating method, etc. may also be used in the same manner as in the first embodiment of the mounting method. Connection can be made by melting the solder 28.

A third embodiment of the mounting method using the semiconductor integrated circuit device of the present invention will be described with reference to the cross-sectional views of FIGS. 4(a) and 4(b).

As in the first embodiment of the mounting method explained using FIG. 2, solder is formed by the solder dip method on the connection portion of the wiring notch 26 of the wiring board 22 to the semiconductor integrated circuit device 12. .

Thereafter, the semiconductor integrated circuit device 12 on which the extraction electrodes 18 described with reference to FIG. 1 are formed is temporarily fixed to a predetermined position on the wiring board 22 using an adhesive 30.

As shown in FIG. 4(a), an ultrasonic generator 62 is placed on the back surface of the semiconductor integrated circuit device 12, and while applying ultrasonic waves to the extraction electrode 18, it is heated using hot air to melt the solder 28. - By solidifying, the semiconductor integrated circuit device 12 is mechanically and electrically connected onto the wiring board 22 as shown in FIG. 4(b).

Here, the effect of applying ultrasonic waves to the extraction electrode is that even when a metal such as aluminum, which generally has low wettability to solder, is used for the extraction electrode 18 of the semiconductor integrated circuit device 12, a good connection can be achieved. It is something that can be done.

In the third embodiment of the mounting method explained using FIG. 4, the solder dipping method was used as the solder forming method, but similarly to the first embodiment of the mounting method explained using FIG. It can also be formed by a plating method, screen printing of solder paste, or the like. Also, similar to the second embodiment of the mounting method explained using FIG.
After the semiconductor integrated circuit device 12 is temporarily fixed on the wiring board 22, the solder 28 having a shape along the outer periphery of the semiconductor integrated circuit device 12 may be placed. Regarding the heating method, in addition to hot air, infrared heating method, laser heating method, etc. can also be used to similarly melt the solder and perform the connection.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the steps of forming a metal laminated film, forming a solder, and forming a protruding electrode by melting the solder, which are required in the conventional FC method, are not necessary. Therefore, the process time required for semiconductor integrated circuit devices is shortened, and by performing a simple soldering process 5 on the wiring board, the connection between the semiconductor integrated circuit device and the wiring board can be made in a shorter process time than in the past. This can be done at low cost. Furthermore, even when a metal with low wettability to solder is used for the electrodes of a semiconductor integrated circuit device, good connections can be made.

[Brief explanation of the drawing]

FIG. 1 is a drawing for explaining the structure of a semiconductor integrated circuit device according to the present invention, in which FIG. 1(a) is a cross-sectional view, FIG. 1(b) is a plan view, and FIGS. e) is a cross-sectional view showing the first embodiment of the mounting method using the semiconductor integrated circuit device of the present invention in the order of steps, and FIGS. 4(a) and 4(b) are cross-sectional views showing a second embodiment of the mounting method in the order of steps, and FIGS. 4(a) and 4(b) are sectional views showing the third embodiment of the mounting method using the semiconductor integrated circuit device of the present invention in the order of steps. It is. 12... Semiconductor integrated circuit device, 14...
・Electrode pad, 16...Passivation film, 18...
- Extraction electrode, 22... Wiring board, 24... Solder resist, 26... Wiring pattern, 28... Solder, 60... Adhesive, 32... Ultrasonic generator. Figure 2 (a) Figure 1 (b) Figure 2 Figure 3 (a) (C) Figure 4 (a) (b)

Claims (4)

[Claims] (1) A plurality of electrode pads provided as input/output terminals of a semiconductor integrated circuit device, a passivation film provided on the surface of the semiconductor integrated circuit device and having an opening only above the electrode pads, and a passivation film that corresponds to each of the electrode pads and that corresponds to the electrode pads. A semiconductor integrated circuit device comprising an extraction electrode made of a conductive material provided on a pad and on the passivation film. (2) A step of forming a solder resist made of photosensitive resin on the entire surface of a wiring board having a wiring pattern and patterning the solder resist by photolithography, and forming solder on the wiring pattern in the opening of the solder resist. a step of removing the solder resist; a step of aligning the lead electrodes of the semiconductor integrated circuit device with the solder and temporarily fixing the semiconductor integrated circuit device; and melting and solidifying the solder by heat treatment. A method for mounting a semiconductor integrated circuit device, comprising: connecting the semiconductor integrated circuit device and the wiring board. (3) A step of temporarily fixing the semiconductor integrated circuit device by aligning the positions of the wiring pattern on the wiring board and the extraction electrode of the semiconductor integrated circuit device, and providing a gap between the wiring pattern and the extraction electrode. The semiconductor integrated circuit device and the wiring board are connected by a step of arranging solder along the outer periphery of the semiconductor integrated circuit device, and a step of melting and solidifying the solder by heat treatment. A method for mounting a semiconductor integrated circuit device. (4) When melting the solder according to claim (2) or (3), ultrasonic waves are applied from the back side of the semiconductor integrated circuit device to the connection portion between the semiconductor integrated circuit device and the wiring board. A method for mounting semiconductor integrated circuit devices.