JPH02120846U - - Google Patents

Info

Publication number
JPH02120846U
JPH02120846U JP3030389U JP3030389U JPH02120846U JP H02120846 U JPH02120846 U JP H02120846U JP 3030389 U JP3030389 U JP 3030389U JP 3030389 U JP3030389 U JP 3030389U JP H02120846 U JPH02120846 U JP H02120846U
Authority
JP
Japan
Prior art keywords
ceramic substrate
package
external connection
polyimide resin
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3030389U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3030389U priority Critical patent/JPH02120846U/ja
Publication of JPH02120846U publication Critical patent/JPH02120846U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案にかかる平板状のICパツケー
ジ用セラミツク基板の一例であるフラツトパツケ
ージ用セラミツク基板の部分斜視図、第2図はそ
の外部接続端子の接続部を拡大して見るための要
部拡大斜視図、第3図は本考案にかかる要部を示
す側断面図、第4図は従来例のフラツトパツケー
ジ用セラミツク基板の部分斜視図、第5図はその
要部を示す側断面図である。 図中 2……ろう付け部、3……ニツケルメツ
キ、4……リード(外部接続端子)、4A……リ
ード(外部接続端子)の取付部、5……銀ろう付
け、6……ニツケルメツキ、7……金メツキ、8
……微小な〓間、9……ポリイミド系樹脂層、1
00……フラツトパツケージ用セラミツク基板(
ICパツケージ用セラミツク基板)、101……
セラミツク基板段部表面、103……段部。
Fig. 1 is a partial perspective view of a ceramic substrate for a flat package, which is an example of a flat ceramic substrate for an IC package according to the present invention, and Fig. 2 is an enlarged view of the connection part of the external connection terminal. FIG. 3 is a side sectional view showing the main parts of the present invention; FIG. 4 is a partial perspective view of a conventional ceramic substrate for a flat package; FIG. 5 is a side sectional view showing the main parts. It is a diagram. In the diagram 2...brazing part, 3...nickel plating, 4...lead (external connection terminal), 4A...lead (external connection terminal) mounting part, 5...silver brazing, 6...nickel plating, 7 ...Gold plating, 8
...Minute gap, 9...Polyimide resin layer, 1
00... Ceramic substrate for flat package (
Ceramic substrate for IC package), 101...
Ceramic substrate stepped portion surface, 103...stepped portion.

Claims (1)

【実用新案登録請求の範囲】 1 集積回路を形成する半導体素子を搭載するた
めのセラミツク基板に、一端が該半導体素子の電
極と電気的に接続し、他端がセラミツク基板の外
表面に露出する配線パターンを複数配列して形成
し、各配線パターンの他端部に外部接続端子をろ
う付けしてなるICパツケージ用セラミツク基板
において、 配列してろう付けされた外部接続端子の取付部
は、その外側に順次ニツケル(Ni)メツキ、金
(Au)メツキが実施され、さらに外側に耐熱性
および絶縁性に優れたポリイミド系樹脂がコーテ
イングされてなることを特徴とするICパツケー
ジ用セラミツク基板。 2 前記ポリイミド系樹脂コーテイングの肉厚は
、10〜100ミクロンであることを特徴とする
請求項1記載のICパツケージ用セラミツク基板
[Claims for Utility Model Registration] 1. A ceramic substrate for mounting a semiconductor element forming an integrated circuit, one end of which is electrically connected to the electrode of the semiconductor element, and the other end exposed to the outer surface of the ceramic substrate. In a ceramic substrate for an IC package, which is formed by arranging a plurality of wiring patterns and brazing external connection terminals to the other end of each wiring pattern, the mounting part of the external connection terminals that are arranged and brazed is A ceramic substrate for an IC package, characterized in that the outside is sequentially plated with nickel (Ni) and then gold (Au), and the outside is further coated with a polyimide resin having excellent heat resistance and insulation properties. 2. The ceramic substrate for an IC package according to claim 1, wherein the polyimide resin coating has a wall thickness of 10 to 100 microns.
JP3030389U 1989-03-16 1989-03-16 Pending JPH02120846U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3030389U JPH02120846U (en) 1989-03-16 1989-03-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3030389U JPH02120846U (en) 1989-03-16 1989-03-16

Publications (1)

Publication Number Publication Date
JPH02120846U true JPH02120846U (en) 1990-09-28

Family

ID=31255254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3030389U Pending JPH02120846U (en) 1989-03-16 1989-03-16

Country Status (1)

Country Link
JP (1) JPH02120846U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0773769A (en) * 1993-09-03 1995-03-17 Ngk Spark Plug Co Ltd External connecting terminal for semi-conductor package and manufacture thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6347150A (en) * 1986-08-18 1988-02-27 Matsushita Graphic Commun Syst Inc Electrostatic recorder

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6347150A (en) * 1986-08-18 1988-02-27 Matsushita Graphic Commun Syst Inc Electrostatic recorder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0773769A (en) * 1993-09-03 1995-03-17 Ngk Spark Plug Co Ltd External connecting terminal for semi-conductor package and manufacture thereof

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