JPH02120840U - - Google Patents
Info
- Publication number
- JPH02120840U JPH02120840U JP1989028568U JP2856889U JPH02120840U JP H02120840 U JPH02120840 U JP H02120840U JP 1989028568 U JP1989028568 U JP 1989028568U JP 2856889 U JP2856889 U JP 2856889U JP H02120840 U JPH02120840 U JP H02120840U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- sealed semiconductor
- organic polymer
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 5
- 229920000620 organic polymer Polymers 0.000 claims description 4
- 239000003795 chemical substances by application Substances 0.000 claims 1
- 229920001971 elastomer Polymers 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 claims 1
- 239000000945 filler Substances 0.000 claims 1
- 239000000499 gel Substances 0.000 claims 1
- 229920000647 polyepoxide Polymers 0.000 claims 1
- 229920001721 polyimide Polymers 0.000 claims 1
- 239000009719 polyimide resin Substances 0.000 claims 1
- 229920001296 polysiloxane Polymers 0.000 claims 1
- 230000001681 protective effect Effects 0.000 claims 1
- 239000005060 rubber Substances 0.000 claims 1
- 229920002050 silicone resin Polymers 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案の実施例を示す樹脂封止型半導
体装置の断面図、第2図は接合材のヤング率と温
度サイクルによる不良発生の関係を示す図、第3
図は従来の樹脂封止型半導体装置の断面図、第4
図は従来の加熱処理前の半導体チツプとアイラン
ドの接合層の断面図、第5図は従来の加熱処理後
の半導体チツプとアイランドの接合層の断面図で
ある。 1……外部リード、2……半導体チツプ取付用
基板(アイランド)、3……チツプボンデイング
用接合材、4……半導体チツプ、5……ボンデイ
ングワイヤ、6……チツプコート膜(有機ポリマ
)、7……モールド樹脂、8……ベント孔、11
……接合材。
体装置の断面図、第2図は接合材のヤング率と温
度サイクルによる不良発生の関係を示す図、第3
図は従来の樹脂封止型半導体装置の断面図、第4
図は従来の加熱処理前の半導体チツプとアイラン
ドの接合層の断面図、第5図は従来の加熱処理後
の半導体チツプとアイランドの接合層の断面図で
ある。 1……外部リード、2……半導体チツプ取付用
基板(アイランド)、3……チツプボンデイング
用接合材、4……半導体チツプ、5……ボンデイ
ングワイヤ、6……チツプコート膜(有機ポリマ
)、7……モールド樹脂、8……ベント孔、11
……接合材。
Claims (1)
- 【実用新案登録請求の範囲】 (1) 半導体チツプ上面に有機ポリマの保護膜を
有する樹脂封止型半導体装置において、 半導体チツプとアイランドの接合材のヤング率
を前記有機ポリマのヤング率より小さくしたこと
を特徴とする樹脂封止型半導体装置。 (2) 前記接合材はシリコーン樹脂、硬化剤、及
びAgフイラーを含むことを特徴とする請求項1
記載の樹脂封止型半導体装置。 (3) 前記有機ポリマはシリコーン系ゲル又はゴ
ム、ポリイミド系樹脂、エポキシ系樹脂等から選
ばれて成ることを特徴とする請求項1記載の樹脂
封止型半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989028568U JPH0745960Y2 (ja) | 1989-03-15 | 1989-03-15 | 樹脂封止型半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989028568U JPH0745960Y2 (ja) | 1989-03-15 | 1989-03-15 | 樹脂封止型半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02120840U true JPH02120840U (ja) | 1990-09-28 |
JPH0745960Y2 JPH0745960Y2 (ja) | 1995-10-18 |
Family
ID=31252047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989028568U Expired - Lifetime JPH0745960Y2 (ja) | 1989-03-15 | 1989-03-15 | 樹脂封止型半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0745960Y2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0786461A (ja) * | 1993-09-02 | 1995-03-31 | Internatl Business Mach Corp <Ibm> | 封止半導体チップ・モジュールおよびモジュールを形成する方法 |
JP2016189360A (ja) * | 2015-03-30 | 2016-11-04 | 株式会社フジクラ | 半導体パッケージおよび圧力センサパッケージ |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56164564A (en) * | 1980-05-21 | 1981-12-17 | Hitachi Ltd | Semiconductor device |
JPS5764939A (en) * | 1980-10-08 | 1982-04-20 | Nec Corp | Semiconductor device |
JPS6148948A (ja) * | 1984-08-16 | 1986-03-10 | Matsushita Electronics Corp | 半導体装置 |
JPS61207038A (ja) * | 1985-03-11 | 1986-09-13 | Fujitsu Ltd | 樹脂封止型半導体装置 |
JPS62210630A (ja) * | 1986-03-12 | 1987-09-16 | Hitachi Ltd | 半導体装置 |
JPS62210651A (ja) * | 1986-03-12 | 1987-09-16 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPS63107156A (ja) * | 1986-10-24 | 1988-05-12 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPH0260793A (ja) * | 1988-08-26 | 1990-03-01 | Hitachi Maxell Ltd | Icカード用の半導体装置 |
-
1989
- 1989-03-15 JP JP1989028568U patent/JPH0745960Y2/ja not_active Expired - Lifetime
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56164564A (en) * | 1980-05-21 | 1981-12-17 | Hitachi Ltd | Semiconductor device |
JPS5764939A (en) * | 1980-10-08 | 1982-04-20 | Nec Corp | Semiconductor device |
JPS6148948A (ja) * | 1984-08-16 | 1986-03-10 | Matsushita Electronics Corp | 半導体装置 |
JPS61207038A (ja) * | 1985-03-11 | 1986-09-13 | Fujitsu Ltd | 樹脂封止型半導体装置 |
JPS62210630A (ja) * | 1986-03-12 | 1987-09-16 | Hitachi Ltd | 半導体装置 |
JPS62210651A (ja) * | 1986-03-12 | 1987-09-16 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPS63107156A (ja) * | 1986-10-24 | 1988-05-12 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPH0260793A (ja) * | 1988-08-26 | 1990-03-01 | Hitachi Maxell Ltd | Icカード用の半導体装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0786461A (ja) * | 1993-09-02 | 1995-03-31 | Internatl Business Mach Corp <Ibm> | 封止半導体チップ・モジュールおよびモジュールを形成する方法 |
JP2016189360A (ja) * | 2015-03-30 | 2016-11-04 | 株式会社フジクラ | 半導体パッケージおよび圧力センサパッケージ |
Also Published As
Publication number | Publication date |
---|---|
JPH0745960Y2 (ja) | 1995-10-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |