JPH0211191B2 - - Google Patents
Info
- Publication number
- JPH0211191B2 JPH0211191B2 JP23931283A JP23931283A JPH0211191B2 JP H0211191 B2 JPH0211191 B2 JP H0211191B2 JP 23931283 A JP23931283 A JP 23931283A JP 23931283 A JP23931283 A JP 23931283A JP H0211191 B2 JPH0211191 B2 JP H0211191B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- parallel
- serial
- frame
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000006243 chemical reaction Methods 0.000 claims description 18
- 238000001514 detection method Methods 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims description 3
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000010363 phase shift Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
Classifications
- 
        - H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
 
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Dc Digital Transmission (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP23931283A JPS60130236A (ja) | 1983-12-19 | 1983-12-19 | 復号器 | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP23931283A JPS60130236A (ja) | 1983-12-19 | 1983-12-19 | 復号器 | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPS60130236A JPS60130236A (ja) | 1985-07-11 | 
| JPH0211191B2 true JPH0211191B2 (OSRAM) | 1990-03-13 | 
Family
ID=17042837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP23931283A Granted JPS60130236A (ja) | 1983-12-19 | 1983-12-19 | 復号器 | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPS60130236A (OSRAM) | 
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| KR101283844B1 (ko) * | 2009-06-19 | 2013-07-08 | 후지쯔 가부시끼가이샤 | 데이터 전송 방법, 코드 변환 회로 및 장치 | 
- 
        1983
        - 1983-12-19 JP JP23931283A patent/JPS60130236A/ja active Granted
 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPS60130236A (ja) | 1985-07-11 | 
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