JPH0172735U - - Google Patents
Info
- Publication number
- JPH0172735U JPH0172735U JP1987169373U JP16937387U JPH0172735U JP H0172735 U JPH0172735 U JP H0172735U JP 1987169373 U JP1987169373 U JP 1987169373U JP 16937387 U JP16937387 U JP 16937387U JP H0172735 U JPH0172735 U JP H0172735U
- Authority
- JP
- Japan
- Prior art keywords
- event
- signal
- reset
- count value
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Manufacturing Of Magnetic Record Carriers (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図ａ〜ｅは第１図に示すカウント装置の動作
を示すタイミングチヤートである。
１，４……プリセツトカウンタ、２……ＡＮＤ
ゲート、３……トータルカウンタ、ａ……インデ
ツクスパルス、ｂ……イベントパルス、ｃ……イ
ベント信号、ｄ……カウントアツプ信号、ｅ……
イベントゲート信号、ｆ……イベントデータ、ｇ
……インデツクスデータ、ｈ……リセツト信号、
ｉ……イベントパルスデータ。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIGS. 2a to 2e are timing charts showing the operation of the counting device shown in FIG. 1. 1, 4...Preset counter, 2...AND
Gate, 3...Total counter, a...Index pulse, b...Event pulse, c...Event signal, d...Count up signal, e...
Event gate signal, f...event data, g
...Index data, h...Reset signal,
i...Event pulse data.
Claims (1)
パルスをカウントし前記イベントパルスデータに
カウント値がなつたときハイレベルになるイベン
ト信号を出力し、インデツクスパルスでカウント
値がリセツトされ、前記イベント信号がローレベ
ルになる第１のプリセツトカウンタと、インデツ
クスデータがセツトされ前記インデツクスパルス
をカウントし前記インデツクスデータにカウント
値がなつたときローレベルになるカウントアツプ
信号を出力しリセツト信号で前記カウントアツプ
信号がハイレベルになる第２のプリセツトカウン
タと、前記カウントアツプ信号がハイレベルの間
前記イベント信号をイベントゲート信号として出
力するＡＮＤゲートと、前記イベントゲートをカ
ウントしカウント値としてイベントデータを出力
し前記リセツト信号でカウント値がリセツトされ
るトータルカウンタとを含むことを特徴とするカ
ウント装置。 The event pulse data is set, the event pulse is counted, and when the count value reaches the event pulse data, an event signal that becomes high level is output, the count value is reset by the index pulse, and the event signal becomes low level. A first preset counter is configured such that the index data is set, the index pulse is counted, and when the count value reaches the index data, a count up signal that becomes low level is outputted, and the count up signal is reset with a reset signal. a second preset counter that becomes high level; an AND gate that outputs the event signal as an event gate signal while the count up signal is high level; and an AND gate that counts the event gate and outputs event data as a count value. A counting device comprising: a total counter whose count value is reset by the reset signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169373U JPH0172735U (en) | 1987-11-04 | 1987-11-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169373U JPH0172735U (en) | 1987-11-04 | 1987-11-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0172735U true JPH0172735U (en) | 1989-05-16 |
Family
ID=31459371
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987169373U Pending JPH0172735U (en) | 1987-11-04 | 1987-11-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0172735U (en) |
-
1987
- 1987-11-04 JP JP1987169373U patent/JPH0172735U/ja active Pending
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