JPH0358051U - - Google Patents
Info
- Publication number
- JPH0358051U JPH0358051U JP11935289U JP11935289U JPH0358051U JP H0358051 U JPH0358051 U JP H0358051U JP 11935289 U JP11935289 U JP 11935289U JP 11935289 U JP11935289 U JP 11935289U JP H0358051 U JPH0358051 U JP H0358051U
- Authority
- JP
- Japan
- Prior art keywords
- error
- pulses
- pulse
- clock
- pulse counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Detection And Prevention Of Errors In Transmission (AREA)
Description
第１図は本考案の誤り率測定装置の一実施例の
ブロツク図、第２図は従来の誤り率測定装置の一
例のブロツク図である。
１……誤りパルス検出部、２……誤りパルスカ
ウンタ、３……最大値設定スイツチ、４……クロ
ツクパルスゲート、５……クロツクパルスカウン
タ、６……誤り率計算部、７……誤り率表示部、
８……誤りパルスゲート、９……誤りパルスカウ
ンタ、１０……クロツク分周カウンタ、１１……
分周比選択スイツチ。
FIG. 1 is a block diagram of an embodiment of an error rate measuring device according to the present invention, and FIG. 2 is a block diagram of an example of a conventional error rate measuring device. 1...Error pulse detection unit, 2...Error pulse counter, 3...Maximum value setting switch, 4...Clock pulse gate, 5...Clock pulse counter, 6...Error rate calculation unit, 7... error rate display section,
8...Error pulse gate, 9...Error pulse counter, 10...Clock frequency division counter, 11...
Division ratio selection switch.
Claims (1)
パルス検出部と、この誤りパルスを設定された数
までカウントする誤りパルスカウンタと、この誤
りパルスカウンタにおけるカウント動作と同時に
クロツクパルスをカウントするクロツクパルスカ
ウンタと、前記カウントされた誤りパルス値とク
ロツクパルス値とに基づいて誤り率を計算する誤
り率計算部とを備えることを特徴とする誤り率測
定装置。 An error pulse detection section that detects error pulses from an input signal, an error pulse counter that counts the error pulses up to a set number, and a clock pulse counter that counts clock pulses simultaneously with the counting operation in the error pulse counter. , an error rate calculation section that calculates an error rate based on the counted error pulse value and the clock pulse value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11935289U JPH0358051U (en) | 1989-10-12 | 1989-10-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11935289U JPH0358051U (en) | 1989-10-12 | 1989-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0358051U true JPH0358051U (en) | 1991-06-05 |
Family
ID=31667477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11935289U Pending JPH0358051U (en) | 1989-10-12 | 1989-10-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0358051U (en) |
-
1989
- 1989-10-12 JP JP11935289U patent/JPH0358051U/ja active Pending
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