JPH0328461U - - Google Patents
Info
- Publication number
- JPH0328461U JPH0328461U JP8935489U JP8935489U JPH0328461U JP H0328461 U JPH0328461 U JP H0328461U JP 8935489 U JP8935489 U JP 8935489U JP 8935489 U JP8935489 U JP 8935489U JP H0328461 U JPH0328461 U JP H0328461U
- Authority
- JP
- Japan
- Prior art keywords
- period
- points
- counter
- control means
- counting control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003213 activating effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
Landscapes
- Traffic Control Systems (AREA)
Description
第１図は本考案の一実施例の周期計測装置の構
成を示すブロツク図、第２図は第１図の選択的逓
倍回路１７の構成の一例を示す回路図、第３図は
第２図の選択的逓倍回路１７の動作を説明するた
めの波形図、第４図は本考案の他の実施例の周期
計測装置の構成を示すブロツク図、第５図は従来
の周期計測装置の構成を車速検出回路によつて例
示するブロツク図、第６図は第５図の回路の動作
を説明するための波形図である。
ＩＮ……周期計測対象の信号Ｓの入力端子、１
１，３１……波形整形回路、１２，３２ａ……立
上がり検出回路、３２ｂ……立下がり検出回路、
１３，３３……遅延回路、１４，３４……カウン
タ、１５，３５……ラツチ回路、１６，３６……
ＣＰＵ、１７……選択的逓倍回路、３９……比較
回路、４０……閾値保持回路。
FIG. 1 is a block diagram showing the configuration of a period measuring device according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of the configuration of the selective multiplier circuit 17 shown in FIG. 1, and FIG. FIG. 4 is a block diagram showing the configuration of a period measuring device according to another embodiment of the present invention, and FIG. 5 shows the configuration of a conventional period measuring device. A block diagram illustrating the vehicle speed detection circuit, FIG. 6 is a waveform diagram for explaining the operation of the circuit of FIG. 5. IN...Input terminal for signal S subject to period measurement, 1
1, 31... Waveform shaping circuit, 12, 32a... Rising detection circuit, 32b... Falling detection circuit,
13, 33... Delay circuit, 14, 34... Counter, 15, 35... Latch circuit, 16, 36...
CPU, 17...Selective multiplication circuit, 39...Comparison circuit, 40...Threshold value holding circuit.
Claims (1)
逆方向への変化点が交互に出現する信号の周期を
計測する装置において、 所定周期のクロツク信号を計数するカウンタと
、 前記信号の隣接する同一方向への変化点間の期
間として定義される１周期にわたつて前記カウン
タに計数を行わせる第１の計数制御手段と、 前記信号の隣接する逆方向への変化点間の期間
として定義される半周期にわたつて前記カウンタ
に計数を行わせる第２の計数制御手段と、 測定対象の信号の周期が所定値未満であるか否
かにに応じて前記第１、第２の計数制御手段のそ
れぞれを選択的に有効化しつつ前記カウンタの計
数値に基づき周期を算定する制御・算定手段とを
備えたことを特徴とする周期計測装置。[Claims for Utility Model Registration] A counter that counts clock signals of a predetermined period in a device that measures the period of a signal in which points of change in a voltage level in an arbitrary direction and points of change in the opposite direction appear alternately. and a first counting control means for causing the counter to count over one period defined as a period between adjacent change points in the same direction of the signal, and adjacent change points in the opposite direction of the signal. a second counting control means for causing the counter to count over a half period defined as a period between points; and a second counting control means for causing the counter to count over a half period defined as a period between points; . A period measuring device comprising: control/calculation means for calculating the period based on the count value of the counter while selectively activating each of the second counting control means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8935489U JPH0328461U (en) | 1989-07-29 | 1989-07-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8935489U JPH0328461U (en) | 1989-07-29 | 1989-07-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0328461U true JPH0328461U (en) | 1991-03-20 |
Family
ID=31638934
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8935489U Pending JPH0328461U (en) | 1989-07-29 | 1989-07-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328461U (en) |
-
1989
- 1989-07-29 JP JP8935489U patent/JPH0328461U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0328461U (en) | ||
| JPH0332835U (en) | ||
| JPH0329749Y2 (en) | ||
| JPH01117770U (en) | ||
| JPH0358051U (en) | ||
| JPH0463098U (en) | ||
| JPS60139280U (en) | pulse monitoring device | |
| JPS628059A (en) | System for detecting pulse input signal | |
| JPS61164556U (en) | ||
| JPH0646381U (en) | Wheel speed measuring device | |
| JPH0466576U (en) | ||
| JPS59117974U (en) | Measurement mode switching circuit | |
| JPS6415115U (en) | ||
| JPH0482797U (en) | ||
| JPS63125425U (en) | ||
| JPS6213048U (en) | ||
| JPS6135443U (en) | Pulse output control circuit | |
| JPS6143729U (en) | Motor protection circuit | |
| JPS59146727U (en) | Flow rate measuring device | |
| JPS63185563U (en) | ||
| JPS6271706U (en) | ||
| JPS6393555U (en) | ||
| JPS61103797U (en) | ||
| JPS62126728U (en) | ||
| JPH02130130U (en) |