JPS61164556U - - Google Patents
Info
- Publication number
- JPS61164556U JPS61164556U JP4639385U JP4639385U JPS61164556U JP S61164556 U JPS61164556 U JP S61164556U JP 4639385 U JP4639385 U JP 4639385U JP 4639385 U JP4639385 U JP 4639385U JP S61164556 U JPS61164556 U JP S61164556U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- cpu
- input
- frequency divider
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 239000013256 coordination polymer Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案に係るＣＰＵの暴走検出回路
の一実施例を示すブロツク線図、第２図ａ，ｂは
その各部信号波形図、第３図は従来のＣＰＵ暴走
検出回路、第４図は上記従来例の信号波形図であ
る。
図中、１１は分周器Ｂ、１２は分周器Ｃ、１３
は反転回路、１４はオア回路、１５はＣＰＵ、１
６は分周器Ａ、１７はＩ／Ｏポートである。
Fig. 1 is a block diagram showing an embodiment of the CPU runaway detection circuit according to this invention, Fig. 2 a and b are signal waveform diagrams of each part thereof, Fig. 3 is a conventional CPU runaway detection circuit, and Fig. 4 is a signal waveform diagram of the above-mentioned conventional example. In the figure, 11 is frequency divider B, 12 is frequency divider C, 13
is an inverting circuit, 14 is an OR circuit, 15 is a CPU, 1
6 is a frequency divider A, and 17 is an I/O port.
Claims (1)
可信号と、Ｉ／Ｏポートを介して上記ＣＰＵから
のデータ信号とを受け、上記ＣＰＵの暴走時に上
記Ｉ／Ｏポートから発せられるＬレベル又はＨレ
ベルに固定されたデータ信号を検出して上記ＣＰ
Ｕの暴走を停止させるためのリセツト信号を送出
するＣＰＵの暴走検出回路において、 上記割込み許可信号を計数用の一方の入力とし
上記データ信号をクリヤ用の他方の入力とする第
１の分周器と、 上記割込み許可信号を計数用の一方の入力とす
るとともに上記データ信号の反転信号をクリヤ用
の他方の入力とし、上記第１の分周器と同一の分
周比を有する第２の分周器と、 上記Ｌレベル又はＨレベルに固定されたデータ
信号の入力に対応して上記第１又は第２の分周器
に形成される一定レベルの信号を上記ＣＰＵのリ
セツト信号として送出するゲート回路とを備えて
いることを特徴とするＣＰＵの暴走検出回路。[Claims for Utility Model Registration] A CPU interrupt enable signal formed from a clock signal and a data signal from the CPU via an I/O port are received, and when the CPU runs out of control, the signal is generated from the I/O port. The data signal fixed at L level or H level is detected and the CP
In a CPU runaway detection circuit that sends out a reset signal to stop runaway of U, there is a first frequency divider that uses the interrupt enable signal as one input for counting and the data signal as the other input for clearing. and a second frequency divider having the same frequency division ratio as the first frequency divider, with the interrupt enable signal as one input for counting and the inverted signal of the data signal as the other input for clearing. a frequency divider; and a gate that sends a constant level signal formed in the first or second frequency divider as a reset signal for the CPU in response to input of the data signal fixed at the L level or the H level. A runaway detection circuit for a CPU, comprising a circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985046393U JPH0751631Y2 (en) | 1985-03-29 | 1985-03-29 | CPU runaway detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985046393U JPH0751631Y2 (en) | 1985-03-29 | 1985-03-29 | CPU runaway detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61164556U true JPS61164556U (en) | 1986-10-13 |
| JPH0751631Y2 JPH0751631Y2 (en) | 1995-11-22 |
Family
ID=30560742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985046393U Expired - Lifetime JPH0751631Y2 (en) | 1985-03-29 | 1985-03-29 | CPU runaway detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0751631Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55110350A (en) * | 1979-02-16 | 1980-08-25 | Hitachi Ltd | Microprocessor |
| JPS5844646U (en) * | 1981-09-17 | 1983-03-25 | 日本電気ホームエレクトロニクス株式会社 | Dettman timer |
-
1985
- 1985-03-29 JP JP1985046393U patent/JPH0751631Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55110350A (en) * | 1979-02-16 | 1980-08-25 | Hitachi Ltd | Microprocessor |
| JPS5844646U (en) * | 1981-09-17 | 1983-03-25 | 日本電気ホームエレクトロニクス株式会社 | Dettman timer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0751631Y2 (en) | 1995-11-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61164556U (en) | ||
| JPS6316339U (en) | ||
| JPH02130130U (en) | ||
| JPH0227237U (en) | ||
| JPS60153355U (en) | Multi-CPU system control device | |
| JPH0473262U (en) | ||
| JPS63188754U (en) | ||
| JPS6273630U (en) | ||
| JPS5963581U (en) | frequency discrimination circuit | |
| JPH048822B2 (en) | ||
| JPS58124895U (en) | Alarm signal holding circuit | |
| JPS58132433U (en) | buffer circuit | |
| JPS621267U (en) | ||
| JPS59117974U (en) | Measurement mode switching circuit | |
| JPS59112164U (en) | distance measuring device | |
| JPH0283481U (en) | ||
| JPS58190710U (en) | Follow-up circuit failure detection circuit | |
| JPS61201156U (en) | ||
| JPH0378340U (en) | ||
| JPS5811338U (en) | Frequency divider circuit | |
| JPH02104448U (en) | ||
| JPS5988946U (en) | input circuit | |
| JPH01156633U (en) | ||
| JPS6067555U (en) | Signal pattern detection circuit | |
| JPS60120366U (en) | noise meter |