JPS60139280U - pulse monitoring device - Google Patents

pulse monitoring device

Info

Publication number
JPS60139280U
JPS60139280U JP2673884U JP2673884U JPS60139280U JP S60139280 U JPS60139280 U JP S60139280U JP 2673884 U JP2673884 U JP 2673884U JP 2673884 U JP2673884 U JP 2673884U JP S60139280 U JPS60139280 U JP S60139280U
Authority
JP
Japan
Prior art keywords
monitoring device
pulse
pulse monitoring
buffer gate
gate means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2673884U
Other languages
Japanese (ja)
Inventor
卓郎 田中
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP2673884U priority Critical patent/JPS60139280U/en
Publication of JPS60139280U publication Critical patent/JPS60139280U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案の一実施例によるパルス監視装置のブロッ
ク回路図である。 P1〜P256・・・・・・プリント晶基板、A1−A
256・・・・・・ANDゲート、C1〜C256・・
・・・・カウンタ、B1−B256・・・・・・3状態
ロジツクバ −ツファ・ゲート、1・・・・・・クロッ
ク発生器、3・・・・・・   CPU、7・・・・・
・デコーダ。
The drawing is a block circuit diagram of a pulse monitoring device according to an embodiment of the present invention. P1-P256...Printed crystal board, A1-A
256...AND gate, C1~C256...
...Counter, B1-B256...3-state logic buffer gate, 1...Clock generator, 3...CPU, 7...
·decoder.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)ある条件が生じたときに発生するパルスを監視し
てそのパルス巾を測定する検査を複数の被検査回路に対
して同時に行うパルス監視装置で、あって、 各被検査回路に対して設けられ、前記パノにスに応答し
てそのパルス巾に相当する時間期間だけ所定周波数のク
ロック信号をカウントするカウンタ回路と、 各カウンタの出力に接続されたバッファゲート手段と、 それぞれのカウンタのカウント値を順次取り込むようそ
れぞれのバッファゲート手段を、順次可能化する制御手
段と、 を具備す−るパルス監視装置。
(1) A pulse monitoring device that simultaneously tests multiple circuits under test by monitoring the pulses generated when a certain condition occurs and measuring the width of the pulses, and for each circuit under test. a counter circuit provided for counting a clock signal of a predetermined frequency for a time period corresponding to the pulse width in response to the pulse width; buffer gate means connected to the output of each counter; A pulse monitoring device comprising: control means for sequentially enabling each buffer gating means to sequentially capture values.
(2)前記バッファゲート手段は、各カウンタのカウン
ト値を取り込むためのデータラインに配置された実用新
案登録請求の範囲第1項に記載の   ゝ、−パルス監
視装置。
(2) The pulse monitoring device according to claim 1, wherein the buffer gate means is arranged on a data line for taking in the count value of each counter.
(3)前記制御手段は周期的にそれぞれのバッファゲー
ト手段を順次可能イヒし、各バッファゲート手段を可能
化した直後に対応カウンタ回路をクリヤする、実用新案
登録請求の範−第1項または第2項のいずれかに記載の
パルス監視装置。   。
(3) The control means periodically enables each buffer gate means in sequence and clears the corresponding counter circuit immediately after enabling each buffer gate means. The pulse monitoring device according to any one of Item 2. .
JP2673884U 1984-02-28 1984-02-28 pulse monitoring device Pending JPS60139280U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2673884U JPS60139280U (en) 1984-02-28 1984-02-28 pulse monitoring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2673884U JPS60139280U (en) 1984-02-28 1984-02-28 pulse monitoring device

Publications (1)

Publication Number Publication Date
JPS60139280U true JPS60139280U (en) 1985-09-14

Family

ID=30523031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2673884U Pending JPS60139280U (en) 1984-02-28 1984-02-28 pulse monitoring device

Country Status (1)

Country Link
JP (1) JPS60139280U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01141702A (en) * 1987-11-30 1989-06-02 Tokyo Seimitsu Co Ltd Control circuit for grinding blade
JP2016531271A (en) * 2013-03-14 2016-10-06 カリフォルニア インスティチュート オブ テクノロジー Anomaly detection of electrical and electrochemical energy units

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01141702A (en) * 1987-11-30 1989-06-02 Tokyo Seimitsu Co Ltd Control circuit for grinding blade
JP2016531271A (en) * 2013-03-14 2016-10-06 カリフォルニア インスティチュート オブ テクノロジー Anomaly detection of electrical and electrochemical energy units
US10353012B2 (en) 2013-03-14 2019-07-16 California Institute Of Technology Systems and methods for detecting abnormalities in electrical and electrochemical energy units
JP2019132849A (en) * 2013-03-14 2019-08-08 カリフォルニア インスティチュート オブ テクノロジー Abnormality detection in electrical and electrochemical energy unit
US10955483B2 (en) 2013-03-14 2021-03-23 California Institute Of Technology Systems and methods for detecting abnormalities in electrical and electrochemical energy units
US11549993B2 (en) 2013-03-14 2023-01-10 California Institute Of Technology Systems and methods for detecting abnormalities in electrical and electrochemical energy units
US11879946B2 (en) 2013-03-14 2024-01-23 California Institute Of Technology Systems and methods for detecting abnormalities in electrical and electrochemical energy units

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