JPS60168076U - Hybrid IC delay time measurement circuit - Google Patents
Hybrid IC delay time measurement circuitInfo
- Publication number
- JPS60168076U JPS60168076U JP5479284U JP5479284U JPS60168076U JP S60168076 U JPS60168076 U JP S60168076U JP 5479284 U JP5479284 U JP 5479284U JP 5479284 U JP5479284 U JP 5479284U JP S60168076 U JPS60168076 U JP S60168076U
- Authority
- JP
- Japan
- Prior art keywords
- hybrid
- delay time
- time measurement
- measurement circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１、第２図は遅延波形図、第３図は本考案の一実施例
の回路ブロック図である。
１・・・被測定混成・・・ＩＣ，２・・・信号発生回路
、３・・・検出回路、４・・・カウンタ、５・・・強制
信号発生回路。1 and 2 are delay waveform diagrams, and FIG. 3 is a circuit block diagram of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Mixed object to be measured...IC, 2...Signal generation circuit, 3...Detection circuit, 4...Counter, 5...Forced signal generation circuit.
Claims (1)
側に波形の立上りあるいは立下り時を検出する検出回路
を配し、各々の信号を入力とするカウンタより成る遅延
時間測定において、該ＩＣ出力側に所定−間経過後強制
的に信号送出する回路を設けたことを特徴とする混成Ｉ
Ｃの遅延時間測定回路。In delay time measurement, a hybrid IC under test is connected to a signal generation circuit, a detection circuit for detecting the rise or fall of a waveform is arranged on the output side of the IC, and a counter is configured to input each signal. A hybrid I characterized in that a circuit for forcibly sending a signal after a predetermined period of time is provided on the output side of the IC.
C delay time measurement circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5479284U JPS60168076U (en) | 1984-04-16 | 1984-04-16 | Hybrid IC delay time measurement circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5479284U JPS60168076U (en) | 1984-04-16 | 1984-04-16 | Hybrid IC delay time measurement circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60168076U true JPS60168076U (en) | 1985-11-07 |
Family
ID=30576867
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5479284U Pending JPS60168076U (en) | 1984-04-16 | 1984-04-16 | Hybrid IC delay time measurement circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60168076U (en) |
-
1984
- 1984-04-16 JP JP5479284U patent/JPS60168076U/en active Pending
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