JPS5882674U - analog tester - Google Patents

analog tester

Info

Publication number
JPS5882674U
JPS5882674U JP17928581U JP17928581U JPS5882674U JP S5882674 U JPS5882674 U JP S5882674U JP 17928581 U JP17928581 U JP 17928581U JP 17928581 U JP17928581 U JP 17928581U JP S5882674 U JPS5882674 U JP S5882674U
Authority
JP
Japan
Prior art keywords
circuit
comparison
analog
level
level setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17928581U
Other languages
Japanese (ja)
Inventor
須原　成史
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP17928581U priority Critical patent/JPS5882674U/en
Publication of JPS5882674U publication Critical patent/JPS5882674U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案アナログテスタの内部構成を示すブロック図
であって、１は被測定ＩＣ，２，３は比較器、６は順序
回路、８は比較情報源、を夫々示している。The figure is a block diagram showing the internal configuration of the analog tester of the present invention, in which 1 indicates an IC to be measured, 2 and 3 comparators, 6 a sequential circuit, and 8 a comparison information source.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ回路を組み込んだ集積回路を検査するアナログ
テスタに於て、被測定集積回路の出力信号レベルを比較
する比較回路と、該比較回線での比較レベルを設定する
レベル設定回路と、該レベル設定回路でのレベル設定順
序を指定する順序回路と、この順序回路の動作を制御す
る比較情報源と、から成り、上記比較回路での比較レベ
ルを変更しつつ同じ測定パターンを複数回走査する事に
依ってアナログ値の測定を行う事を特徴としたアナログ
テスタ。In an analog tester that tests integrated circuits incorporating analog circuits, there are a comparison circuit that compares the output signal level of the integrated circuit under test, a level setting circuit that sets the comparison level on the comparison line, and the level setting circuit. It consists of a sequential circuit that specifies the order of level setting in the circuit, and a comparison information source that controls the operation of this sequential circuit. An analog tester characterized by measuring analog values.
JP17928581U 1981-11-30 1981-11-30 analog tester Pending JPS5882674U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17928581U JPS5882674U (en) 1981-11-30 1981-11-30 analog tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17928581U JPS5882674U (en) 1981-11-30 1981-11-30 analog tester

Publications (1)

Publication Number Publication Date
JPS5882674U true JPS5882674U (en) 1983-06-04

Family

ID=29974843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17928581U Pending JPS5882674U (en) 1981-11-30 1981-11-30 analog tester

Country Status (1)

Country Link
JP (1) JPS5882674U (en)

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