JPH0149054B2 - - Google Patents

Info

Publication number
JPH0149054B2
JPH0149054B2 JP23136882A JP23136882A JPH0149054B2 JP H0149054 B2 JPH0149054 B2 JP H0149054B2 JP 23136882 A JP23136882 A JP 23136882A JP 23136882 A JP23136882 A JP 23136882A JP H0149054 B2 JPH0149054 B2 JP H0149054B2
Authority
JP
Japan
Prior art keywords
output
clock signal
level
state
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP23136882A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59121487A (ja
Inventor
Hiroshi Mizuguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP23136882A priority Critical patent/JPS59121487A/ja
Priority to US06/542,195 priority patent/US4587665A/en
Publication of JPS59121487A publication Critical patent/JPS59121487A/ja
Publication of JPH0149054B2 publication Critical patent/JPH0149054B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/58Gating or clocking signals not applied to all stages, i.e. asynchronous counters
    • H03K23/62Gating or clocking signals not applied to all stages, i.e. asynchronous counters reversible
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/16Circuits for carrying over pulses between successive decades
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/58Gating or clocking signals not applied to all stages, i.e. asynchronous counters

Landscapes

  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
JP23136882A 1982-10-15 1982-12-27 アツプダウンカウンタ Granted JPS59121487A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP23136882A JPS59121487A (ja) 1982-12-27 1982-12-27 アツプダウンカウンタ
US06/542,195 US4587665A (en) 1982-10-15 1983-10-14 Binary counter having buffer and coincidence circuits for the switched bistable stages thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23136882A JPS59121487A (ja) 1982-12-27 1982-12-27 アツプダウンカウンタ

Publications (2)

Publication Number Publication Date
JPS59121487A JPS59121487A (ja) 1984-07-13
JPH0149054B2 true JPH0149054B2 (ko) 1989-10-23

Family

ID=16922519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23136882A Granted JPS59121487A (ja) 1982-10-15 1982-12-27 アツプダウンカウンタ

Country Status (1)

Country Link
JP (1) JPS59121487A (ko)

Also Published As

Publication number Publication date
JPS59121487A (ja) 1984-07-13

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