JPH0147055B2 - - Google Patents

Info

Publication number
JPH0147055B2
JPH0147055B2 JP58229600A JP22960083A JPH0147055B2 JP H0147055 B2 JPH0147055 B2 JP H0147055B2 JP 58229600 A JP58229600 A JP 58229600A JP 22960083 A JP22960083 A JP 22960083A JP H0147055 B2 JPH0147055 B2 JP H0147055B2
Authority
JP
Japan
Prior art keywords
carrier
phase
circuit
jitter
phase error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58229600A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60121828A (ja
Inventor
Masayoshi Inoe
Takashi Kako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58229600A priority Critical patent/JPS60121828A/ja
Publication of JPS60121828A publication Critical patent/JPS60121828A/ja
Publication of JPH0147055B2 publication Critical patent/JPH0147055B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP58229600A 1983-12-05 1983-12-05 キヤリア位相制御回路 Granted JPS60121828A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58229600A JPS60121828A (ja) 1983-12-05 1983-12-05 キヤリア位相制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58229600A JPS60121828A (ja) 1983-12-05 1983-12-05 キヤリア位相制御回路

Publications (2)

Publication Number Publication Date
JPS60121828A JPS60121828A (ja) 1985-06-29
JPH0147055B2 true JPH0147055B2 (enrdf_load_html_response) 1989-10-12

Family

ID=16894718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58229600A Granted JPS60121828A (ja) 1983-12-05 1983-12-05 キヤリア位相制御回路

Country Status (1)

Country Link
JP (1) JPS60121828A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4827449B2 (ja) * 2005-07-15 2011-11-30 日本無線株式会社 振幅位相制御装置および受信システム

Also Published As

Publication number Publication date
JPS60121828A (ja) 1985-06-29

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