JPH0142011B2 - - Google Patents

Info

Publication number
JPH0142011B2
JPH0142011B2 JP57041579A JP4157982A JPH0142011B2 JP H0142011 B2 JPH0142011 B2 JP H0142011B2 JP 57041579 A JP57041579 A JP 57041579A JP 4157982 A JP4157982 A JP 4157982A JP H0142011 B2 JPH0142011 B2 JP H0142011B2
Authority
JP
Japan
Prior art keywords
processor
subchannel
address
register
destination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57041579A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58158732A (ja
Inventor
Eiichi Uozumi
Takayuki Hoshiko
Ikuro Koyaizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP57041579A priority Critical patent/JPS58158732A/ja
Publication of JPS58158732A publication Critical patent/JPS58158732A/ja
Publication of JPH0142011B2 publication Critical patent/JPH0142011B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP57041579A 1982-03-16 1982-03-16 プロセツサ間通信方式 Granted JPS58158732A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57041579A JPS58158732A (ja) 1982-03-16 1982-03-16 プロセツサ間通信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57041579A JPS58158732A (ja) 1982-03-16 1982-03-16 プロセツサ間通信方式

Publications (2)

Publication Number Publication Date
JPS58158732A JPS58158732A (ja) 1983-09-21
JPH0142011B2 true JPH0142011B2 (cg-RX-API-DMAC10.html) 1989-09-08

Family

ID=12612349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57041579A Granted JPS58158732A (ja) 1982-03-16 1982-03-16 プロセツサ間通信方式

Country Status (1)

Country Link
JP (1) JPS58158732A (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01178242A (ja) * 1988-01-08 1989-07-14 Toshiba Corp 寝台高さ表示装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6272053A (ja) * 1985-09-25 1987-04-02 Nec Corp プロセツサユニツト
DE69129840T2 (de) * 1990-09-28 1998-12-03 Fujitsu Ltd., Kawasaki, Kanagawa Nachrichtensteuerungsverfahren für ein datenkommunikationssystem
EP0504414B1 (en) * 1990-09-28 1998-07-22 Fujitsu Limited Message control system in a data communication system
JP2512849B2 (ja) * 1990-09-28 1996-07-03 富士通株式会社 デ―タ通信システムのメッセ―ジ制御方式
JP2512847B2 (ja) * 1990-09-28 1996-07-03 富士通株式会社 デ―タ通信システムのメッセ―ジ制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01178242A (ja) * 1988-01-08 1989-07-14 Toshiba Corp 寝台高さ表示装置

Also Published As

Publication number Publication date
JPS58158732A (ja) 1983-09-21

Similar Documents

Publication Publication Date Title
US4562533A (en) Data communications system to system adapter
US4041472A (en) Data processing internal communications system having plural time-shared intercommunication buses and inter-bus communication means
JP3165022B2 (ja) コンピュータ・システム及びメッセージ転送方法
JPH0554144B2 (cg-RX-API-DMAC10.html)
JPS63255759A (ja) 制御システム
KR920004771B1 (ko) 작업 관련 메세지 흐름 제어방법 및 통신 관리 장치
JPS6115263A (ja) 処理装置間指令転送制御方式
JPH0142011B2 (cg-RX-API-DMAC10.html)
GB2086625A (en) Disc intercommunication system
DK170081B1 (da) Dataoverføringskredsløb
JPH069361B2 (ja) メツセージ伝送方法
JPS636893B2 (cg-RX-API-DMAC10.html)
WO1991010958A1 (en) Computer bus system
JPH08221355A (ja) 多重プロセッサシステム
JP2576236B2 (ja) プログラマブルコントローラの通信方法
JP2705955B2 (ja) 並列情報処理装置
JP2853607B2 (ja) ジョブ間通信システム
JP2627355B2 (ja) データ通信方式
JPS61262876A (ja) マルチプロセツサシステム
JPS6217879Y2 (cg-RX-API-DMAC10.html)
JPH0544053B2 (cg-RX-API-DMAC10.html)
JPS6362779B2 (cg-RX-API-DMAC10.html)
JPH06149753A (ja) セマフォ制御方法
JPS6028459B2 (ja) デ−タ伝送方式
JPS5844426Y2 (ja) プロセッサ間情報転送装置