JPH0140514B2 - - Google Patents

Info

Publication number
JPH0140514B2
JPH0140514B2 JP57141407A JP14140782A JPH0140514B2 JP H0140514 B2 JPH0140514 B2 JP H0140514B2 JP 57141407 A JP57141407 A JP 57141407A JP 14140782 A JP14140782 A JP 14140782A JP H0140514 B2 JPH0140514 B2 JP H0140514B2
Authority
JP
Japan
Prior art keywords
semiconductor laser
silicon
gold
submount
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57141407A
Other languages
Japanese (ja)
Other versions
JPS5931085A (en
Inventor
Yoshito Ikuwa
Shoichi Kakimoto
Shigeyuki Nitsuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57141407A priority Critical patent/JPS5931085A/en
Publication of JPS5931085A publication Critical patent/JPS5931085A/en
Publication of JPH0140514B2 publication Critical patent/JPH0140514B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0235Method for mounting laser chips
    • H01S5/02355Fixing laser chips on mounts
    • H01S5/0237Fixing laser chips on mounts by soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To enable to braze a semiconductor laser chip to an Si sub mount and a metallic block at the same time by a method wherein an Au plated film is provided previously on the main surface whereon the semiconductor laser chip is enabled to be brazed. CONSTITUTION:The Si sub mount 1' is mounted on the Ag block 3, and the semiconductor laser chip 2' is mounted on the sub mount 1'. Au plated films 15-17 are formed respectively on the brazing surfaces of the sub mount 1' and the laser chip 2'. When these elements successively mounted are heated, the platings 15-17 on each junction surface fuse, resulting in connection each other. Thereby, the semiconductor laser element, Si sub mount, and metallic block can be brazed at the same time; therefore the yield of the laser device and the workability of the manufacture can be contrived to improve.

Description

【発明の詳細な説明】 本発明は、半導体レーザ装置の製造方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor laser device.

半導体レーザのチツプは、動作中に発生する熱
の放出を良くし、かつ、ハンドリングを容易にす
るため、銀等のブロツクにろう付けされる。信頼
性を考えた時、このろう材としては、金・シリコ
ンろう等を使用するのが良い。しかし、金・シリ
コンろう材は硬質であるため、チツプをブロツク
に金・シリコンろう材を介して直接ろう付けする
と、チツプとブロツクの熱膨張率の違いによりチ
ツプにひずみが発生し易く、レーザ特性が悪くな
り易い。これを防止するために、シリコン板(以
後シリコンサブマウントと称す)をチツプとブロ
ツクの間にはさんでろう付けする方法がしばしば
行なわれる。
Semiconductor laser chips are soldered to a block made of silver or the like in order to improve the dissipation of heat generated during operation and to facilitate handling. When considering reliability, it is best to use gold or silicone brazing material as this brazing material. However, since the gold/silicon brazing material is hard, if the chip is brazed directly to the block via the gold/silicon brazing material, the chip is likely to become distorted due to the difference in thermal expansion coefficient between the chip and the block, resulting in laser characteristics. tends to get worse. To prevent this, a method is often used in which a silicon plate (hereinafter referred to as a silicon submount) is sandwiched between the chip and the block and brazed.

従来のこのチツプ、シリコンサブマウント、お
よびブロツクのろう付けは、第1図a示すように
例えば両面約2μmの金メツキ膜11を有する厚
み300μmのシリコンサブマウント1を先ず第1
図bに示すように430℃窒素雰囲気中に置き、シ
リコンサブマウント1の材料であるシリコン12
とメツキされた金11の共晶により金・シリコン
ろう材13を形成し、チツプ2をこの共振器面6
と垂直な面7をピンセツトでつかみみ前記金・シ
リコンろう材13中でシリコンサブマウント1に
こすることにより半導体レーザチツプ2とシリコ
ンサブマウント1をろう付けし、続いて第1図c
に示すように銀ブロツク3を430℃の窒素雰囲気
中に置き、この銀ブロツク3のろう付けする位置
にに金・シリコンろう材14を溶かしたのち、前
記チツプ2をろう付けしたシリコンサブマウント
1を金・シリコンろう材14中で銀ブロツク3に
こすることにより、シリコンサブマウント1と銀
ブロツク3のろう付けを行なう。
In the conventional brazing of the chip, silicon submount, and block, as shown in FIG.
As shown in Figure b, silicon 12, which is the material of silicon submount 1, was placed in a nitrogen atmosphere at 430°C.
A gold-silicon brazing material 13 is formed by the eutectic of gold 11 plated with
The semiconductor laser chip 2 and the silicon submount 1 are brazed by grasping the perpendicular surface 7 with tweezers and rubbing it against the silicon submount 1 in the gold-silicon brazing material 13, and then brazing the semiconductor laser chip 2 and the silicon submount 1 as shown in FIG.
As shown in the figure, a silver block 3 is placed in a nitrogen atmosphere at 430°C, and a gold/silicon brazing material 14 is melted at the position of the silver block 3 to be brazed. The silicon submount 1 and the silver block 3 are brazed together by rubbing the gold onto the silver block 3 in a gold/silicon brazing material 14.

しかしながら、かかる従来のろう付け方法では
次に示す欠点があつた。
However, such conventional brazing methods have the following drawbacks.

1 チツプ2とシリコンサブマウント1のろう付
けの際、チツプ2は、共振器面に垂直な面7を
つかんで共晶にて形成された金・シリコンろう
材13中でシリコンサブマウント1ににこすら
れるため、チツプ2にろう材がつき易くまたチ
ツプ2の共振器面に垂直な面7が傷つき易い。
このため半導体レーザの特性が悪くなることが
ある。
1 When brazing the chip 2 and the silicon submount 1, the chip 2 is attached to the silicon submount 1 in the gold-silicon brazing material 13 formed by eutectic, grasping the surface 7 perpendicular to the cavity surface. Because of the rubbing, the solder metal tends to adhere to the chip 2 and the surface 7 of the chip 2 perpendicular to the resonator surface is easily damaged.
Therefore, the characteristics of the semiconductor laser may deteriorate.

2 シリコンサブマウント1を銀ブロツク3にろ
う付けする時に、先にシリコンサブマウント1
の銀ブロツク3へのろう材と同一温度でシリコ
ンサブマウント1上にろう付けされたチツプ2
が動くことがある。
2 When brazing silicon submount 1 to silver block 3, first attach silicon submount 1 to silver block 3.
Chip 2 is brazed onto the silicon submount 1 at the same temperature as the brazing material to the silver block 3 of
may move.

本発明は上記従来の半導体レーザ装置のろう付
法の欠点を取除くためになされたものであり、シ
リコンサブマウント上に半導体レーザ素子を互の
金メツキ面が接するように載せると共に、半導体
レーザ素子が載せられたシリコンサブマウントを
この金メツキ面が接するように金属ブロツクに載
せ、半導体レーザ素子、シリコンサブマウント及
び金属ブロツクを同時にろう付し、歩留と作業性
が共に良好な半導体レーザ装置の製造方法を提供
する。
The present invention was made in order to eliminate the drawbacks of the conventional brazing method for semiconductor laser devices. The silicon submount on which it is mounted is placed on a metal block so that the gold-plated surfaces are in contact with each other, and the semiconductor laser element, silicon submount, and metal block are simultaneously brazed to create a semiconductor laser device with good yield and workability. A manufacturing method is provided.

以下、第2図より本発明の一実施例を詳細に説
明する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to FIG.

第2図aは本発明の一実施例の半導体レーザの
ろう付けに使用されるシリコンサブマウントの断
面図である。図中1はシリコンサブマウント、1
2は厚さ300μmのシリコン、15は半導体レー
ザチツプをろう付けする面に被着された1〜6μ
mの厚みの金メツキ膜、16は銀ブロツクにろう
付けされる面に被着された10〜20μmの厚みの金
メツキ膜である。1′は前記12,15,16か
らなるシリコンサブマウントである。ろう付けは
先ず第2図bに示すように200℃の窒素雰囲気中
で銀ブロツク3の上の所定の位置に前記シリコン
サブマウント1′を載せ、続いてサブマウント
1′の上の所定の位置に、ろう付けする面に1〜
3μmの厚みの金メツキ膜17を有する半導体レ
ーザチツプ2′を載せ、銀ブロツク3、サブマウ
ント1′、半導体レーザチツプ2′を固定する。続
いて半導体レーザチツプ2′の上に例えば20gの
荷重を位置合せを済ませ固定してあるチツプ2′、
シリコンサブマウント1′、銀ブロツク3に加え
ながら、窒素・水素混合ガス雰囲気中で温度を
430℃に上げ、シリコンサブマウント上にメツキ
された金16、あるいはシリコンサブマウント上
にメツキされた金15および半導体レーザチツプ
2′にメツキされた金17とシリコンサブマウン
ト1′のシリコンとの共晶により形成される第2
図cに示すように金・シリコンろう材18,19
により、銀ブロツク3とシリコンサブマウント
1′およびこのシリコンサブマウント1′と半導体
レーザチツプ2′を同時にろう付けする。この昇
温時銀ブロツク3に接したシリコンサブマウント
1′面には約20μmの金・シリコンろう材18が
形成されるが、荷重によりこの金・シリコンろう
材18は銀ブロツク3上に広がる。同時にシリコ
ンサブマウント1′は金・シリコンろう材18の
溶けている状態で十数μm沈みこみ銀ブロツク3
とサブマウント1′の接着が良好に行なわれる。
一方半導体レーザチツプ2′とサブマウント1′の
接着もサブマウント1′のシリコンと半導体レー
ザチツプ2′にメツキされた金17が共晶するの
で良好に行なわれる。
FIG. 2a is a sectional view of a silicon submount used for soldering a semiconductor laser according to an embodiment of the present invention. 1 in the figure is a silicon submount, 1
2 is silicon with a thickness of 300 μm, and 15 is a 1-6 μm film adhered to the surface to which the semiconductor laser chip is to be brazed.
The gold plating film 16 has a thickness of 10 to 20 μm and is applied to the surface to be brazed to the silver block. 1' is a silicon submount consisting of the above-mentioned 12, 15, and 16. For brazing, first place the silicon submount 1' on a predetermined position on the silver block 3 in a nitrogen atmosphere at 200°C, and then place the silicon submount 1' on a predetermined position on the submount 1' as shown in FIG. 1~ on the surface to be brazed
A semiconductor laser chip 2' having a gold plating film 17 with a thickness of 3 μm is mounted, and the silver block 3, submount 1', and semiconductor laser chip 2' are fixed. Next, a load of, for example, 20 g is aligned and fixed on top of the semiconductor laser chip 2',
While adding silicon submount 1' and silver block 3, the temperature was increased in a nitrogen/hydrogen mixed gas atmosphere.
The temperature is raised to 430°C, and the gold 16 plated on the silicon submount, or the gold 15 plated on the silicon submount and the gold 17 plated on the semiconductor laser chip 2' are eutectic with the silicon of the silicon submount 1'. the second formed by
As shown in Figure c, gold/silicon brazing filler metals 18, 19
As a result, the silver block 3 and the silicon submount 1' and the silicon submount 1' and the semiconductor laser chip 2' are simultaneously brazed. When the temperature is raised, a gold/silicon brazing material 18 of about 20 μm is formed on the surface of the silicon submount 1' in contact with the silver block 3, but this gold/silicon brazing material 18 spreads over the silver block 3 due to the load. At the same time, the silicon submount 1' sinks by more than ten μm due to the melted gold/silicon brazing material 18, and the silver block 3
and submount 1' are bonded well.
On the other hand, the adhesion between the semiconductor laser chip 2' and the submount 1' is also performed well because the silicon of the submount 1' and the gold 17 plated on the semiconductor laser chip 2' are eutectic.

本発明の一実施例の方法によれば、半導体レー
ザチツプ2′のろう付される主面に予め金メツキ
膜17を設けたので、半導体レーザチツプ2′の
ろう付部表面が酸化されることがなく、したがつ
て半導体レーザチツプ2′をシリコンサブマウン
ト1′にこすりながらろう付する必要がないので、
半導体レーザチツプ2′シリコンサブマウント
1′および銀ブロツク3は同時にろう付けするこ
とができる。すなわち、同時にろう材が溶けてい
る状態で半導体レーザチツプ1′をつかむことは
無いので半導体レーザチツプ1′の共振器面6お
よびこれに垂直な面7にう材が付着したりこの面
を傷つけたりすることはなくしたがつて半導体レ
ーザの特性が悪くなることは無い。また半導体レ
ーザチツプ2′、シリコンサブマウント1′および
銀ブロツク3を同時にろう付したで、ろう付中に
半導体レーザチツプ2′が動くという問題も生じ
ない。
According to the method of one embodiment of the present invention, since the gold plating film 17 is provided in advance on the main surface of the semiconductor laser chip 2' to be brazed, the surface of the brazed portion of the semiconductor laser chip 2' is not oxidized. Therefore, there is no need to rub the semiconductor laser chip 2' onto the silicon submount 1' while brazing it.
The semiconductor laser chip 2', the silicon submount 1' and the silver block 3 can be brazed together. That is, since the semiconductor laser chip 1' is not gripped while the filler metal is melted at the same time, the filler material may adhere to the resonator surface 6 of the semiconductor laser chip 1' and the surface 7 perpendicular thereto, or damage this surface. Therefore, the characteristics of the semiconductor laser will not deteriorate. Further, since the semiconductor laser chip 2', the silicon submount 1' and the silver block 3 are brazed at the same time, there is no problem of the semiconductor laser chip 2' moving during brazing.

なお、本実施例ではブロツクとして銀ブロツク
を用いたが、銀メツキや金メツキを施こした銅ブ
ロツクを用いてもさしつかえない。
Although a silver block was used as the block in this embodiment, a copper block plated with silver or gold may also be used.

以上説明のように本発明によればシリコンサブ
マウント上に半導体レーザ素子を互の金メツキ面
が接するように載せると共に、半導体レーザ素子
が載せられたシリコンサブマウントをこの金メツ
キ面が接するように金属ブロツクに載せ、半導体
レーザ素子、シリコンサブマウントおよび金属ブ
ロツを同時にろう付することができるので、半導
体レーザ装置の歩留と製造上の作業性が向上する
という優れた効果を有する。
As described above, according to the present invention, semiconductor laser devices are mounted on a silicon submount so that their gold-plated surfaces are in contact with each other, and the silicon submount on which the semiconductor laser devices are mounted is mounted so that the gold-plated surfaces are in contact with each other. Since the semiconductor laser element, the silicon submount, and the metal block can be mounted on a metal block and brazed at the same time, it has the excellent effect of improving the yield and manufacturing workability of the semiconductor laser device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図a〜cは従来の半導体レーザ装置のろう
付方法を示す工程別断面図、第2図a〜cは本発
明の一実施例のろう付方法を示す工程別断面図で
ある。 図中、1′はシリコンサブマウント、2′は半導
体レーザチツプ、3は銀ブロツク、15,16は
シリコンサブマウントに被着された金メツキ膜、
17はチツプに被着された金メツキ膜、18はシ
リコンサブマウントとこれに被着された金の結晶
にて形成された金・シリコンろう材、19はシリ
コンサブマウントとこれに被着された金およびチ
ツプに被着された金の共晶にて形成された金・シ
リコンろう材である。図中同一符号は同一または
相当部分を示す。
1A to 1C are step-by-step sectional views showing a conventional brazing method for a semiconductor laser device, and FIGS. 2A to 2C are step-by-step sectional views showing a brazing method according to an embodiment of the present invention. In the figure, 1' is a silicon submount, 2' is a semiconductor laser chip, 3 is a silver block, 15 and 16 are gold plating films deposited on the silicon submount,
17 is a gold plating film attached to the chip, 18 is a silicon submount and a gold/silicon brazing material formed of gold crystals attached to it, and 19 is a silicon submount and attached to this. This is a gold/silicon brazing material made of gold and a gold eutectic deposited on a chip. The same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 1 半導体レーザ素子の一方の主面に金メツキを
施す工程と、この半導体レーザ素子が取付られる
シリコンサブマウントの両主面にそれぞれ金メツ
キを施す工程と、前記シリコンサブマウント上に
前記半導体レーザ素子を互の金メツキ面が接する
ように載せると共に、前記半導体レーザ素子が載
せられたシリコンサブマウントをこの金メツキ面
が接するように金属ブロツクに載せ、前記半導体
レーザ素子、シリコンサブマウント、及び金属ブ
ロツクを同時にろう付する工程を含む半導体レー
ザ装置の製造方法。 2 金属ブロツクに接する側のシリコンサブマウ
ントのメツキ厚みを10〜20μmとすることを特徴
とした特許請求の範囲第1項記載の半導体レーザ
装置の製造方法。
[Scope of Claims] 1. A step of gold plating one main surface of a semiconductor laser element, a step of gold plating each of both main surfaces of a silicon submount to which this semiconductor laser element is mounted, and a step of gold plating the silicon submount. The semiconductor laser elements are placed on top so that their gold-plated surfaces are in contact with each other, and the silicon submount on which the semiconductor laser elements are placed is placed on a metal block so that the gold-plated surfaces are in contact with each other. A method for manufacturing a semiconductor laser device including a step of simultaneously brazing a submount and a metal block. 2. The method of manufacturing a semiconductor laser device according to claim 1, wherein the plating thickness of the silicon submount on the side in contact with the metal block is 10 to 20 μm.
JP57141407A 1982-08-13 1982-08-13 Manufacture of semiconductor laser Granted JPS5931085A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57141407A JPS5931085A (en) 1982-08-13 1982-08-13 Manufacture of semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57141407A JPS5931085A (en) 1982-08-13 1982-08-13 Manufacture of semiconductor laser

Publications (2)

Publication Number Publication Date
JPS5931085A JPS5931085A (en) 1984-02-18
JPH0140514B2 true JPH0140514B2 (en) 1989-08-29

Family

ID=15291283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57141407A Granted JPS5931085A (en) 1982-08-13 1982-08-13 Manufacture of semiconductor laser

Country Status (1)

Country Link
JP (1) JPS5931085A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5031136B2 (en) * 2000-03-01 2012-09-19 浜松ホトニクス株式会社 Semiconductor laser device
JP2013004571A (en) * 2011-06-13 2013-01-07 Hamamatsu Photonics Kk Semiconductor laser device

Also Published As

Publication number Publication date
JPS5931085A (en) 1984-02-18

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