JPH01255297A - Manufacture of multilayer interconnection substrate - Google Patents

Manufacture of multilayer interconnection substrate

Info

Publication number
JPH01255297A
JPH01255297A JP8341588A JP8341588A JPH01255297A JP H01255297 A JPH01255297 A JP H01255297A JP 8341588 A JP8341588 A JP 8341588A JP 8341588 A JP8341588 A JP 8341588A JP H01255297 A JPH01255297 A JP H01255297A
Authority
JP
Japan
Prior art keywords
resin
inner layer
copper foil
layer material
foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8341588A
Other languages
Japanese (ja)
Inventor
Yoshinori Urakuchi
浦口 良範
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP8341588A priority Critical patent/JPH01255297A/en
Publication of JPH01255297A publication Critical patent/JPH01255297A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H05K3/385Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve oxidation resistance, solder heat resistance of an inner layer copper foil and the adhesive properties of the inner layer copper foil by treating the foil with a mixture solution of potassium persulfate and sodium hydroxide, covering the surface with synthetic resin containing a specific chlorine content, and then laminating it integrally with an outer layer material through a resin-impregnated base material. CONSTITUTION:A both-side copper-lined glass cloth material base epoxy resin inner layer material having approx. 1mm of thickness having a copper foil is treated with mixture solution of potassium persulfate and sodium hydroxide. Then, the treated surface is covered with synthetic resin containing 0-0.05wt.% of chlorine content. The inner layer material and an outer layer material are laminated integrally through a resin impregnated base material. As the synthetic resin, phenol resin, cresol resin, epoxy resin, unsaturated polyester resin, polyimide resin, etc., is employed, and the thickness is preferably 0.01-1mm.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電気機器、計算機器、通信機器等に用いられる
多層配線基板の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a multilayer wiring board used in electrical equipment, computing equipment, communication equipment, etc.

〔従来の技術〕[Conventional technology]

従来、電気機5等に用いられる多層配線基板の内層銅箔
は亜塩素酸ナトIIウムや過硫酸力+1ウムで酸化処理
後、樹脂含浸基材を有して外層材と墳11一体化するこ
とによって得られている。
Conventionally, the inner layer copper foil of a multilayer wiring board used for electrical equipment 5, etc. is oxidized with sodium II chlorite or persulfate + 1 um, and then integrated with the outer layer material using a resin-impregnated base material. It is obtained by

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の技術で述べたように多層配線基板の内層鋼箔を亜
塩素酸す) IIウムで処理すると銅箔の耐酸性、接着
性が低下し、内層銅箔を過硫酸力11ウムで処理すると
銅箔の半田耐熱性、接着性が低下するという問題があっ
た。更にエポキシ樹脂多層配線基板にあっては一般に耐
スミア性が悪すと論う問題がゐ−た。本発明は従来の技
術における上述の問題点に鑑みてなされたもので、その
目的とするところは、内層鋼箔の耐酸性、接着性、半田
耐熱性が同上し史にエポキシ樹脂多層配線基板にあって
は耐スミア性の向上した多層配線基板の製造方法を提供
することにある。
As described in the conventional technology, when the inner layer steel foil of a multilayer wiring board is treated with chlorite), the acid resistance and adhesion of the copper foil decreases, and when the inner layer copper foil is treated with 11 um persulfate, the copper foil loses its acid resistance and adhesion. There was a problem in that the soldering heat resistance and adhesiveness of the copper foil deteriorated. Furthermore, epoxy resin multilayer wiring boards generally have a problem of poor smear resistance. The present invention has been made in view of the above-mentioned problems in the conventional technology, and its purpose is to improve the acid resistance, adhesion, and solder heat resistance of the inner layer steel foil, and to improve the acid resistance, adhesion, and solder heat resistance of the inner layer steel foil, which has been previously used in epoxy resin multilayer wiring boards. Another object of the present invention is to provide a method for manufacturing a multilayer wiring board with improved smear resistance.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は内層銅箔を過硫酸カリウムと水酸化ナトリウム
との混合溶液で処理後、該表面を塩素含有量が0〜0.
05Wit%(以下屯に俤と記す)の合成樹脂で被覆し
てから、樹脂含浸基材を介して外層材と槓1vII一体
化するこきを特徴とする多層配線基板の′#漬方法のた
め上記目的を達成することができたもので、以下本発明
の詳細な説明する。
In the present invention, after treating the inner layer copper foil with a mixed solution of potassium persulfate and sodium hydroxide, the surface is treated with a chlorine content of 0 to 0.
The method for dipping a multilayer wiring board is described above, which is characterized by coating with a synthetic resin of 0.5 Wit% (hereinafter referred to as "Ton") and then integrating it with the outer layer material through a resin-impregnated base material. The present invention has been achieved and will now be described in detail.

本発明は過硫酸力11ウムと水酸化ナトリウムとの混合
溶液で内j−銅箔を処理するもので、轄混合溶液以外の
処理液では処理面が粗面化しなかったり、粗大になり過
ぎるので耐酸性、接信性、半田耐熱性を同上させること
はできない。混合溶液の濃度、処理温度、処理時間等に
ついては特に限定するものではない。次いで内層銅箔処
理表面を塩素含有閂がO〜o、os4の7エノール樹脂
、エポキシ樹脂、不飽和ボ11エステル樹脂、ボ11イ
ミド樹脂、弗化樹脂等の合成樹脂で被橿するものである
In the present invention, copper foil is treated with a mixed solution of 11 um persulfuric acid and sodium hydroxide, and treatment solutions other than the mixed solution do not roughen the treated surface or make it too coarse. It is impossible to improve acid resistance, connectivity, and soldering heat resistance. There are no particular limitations on the concentration of the mixed solution, treatment temperature, treatment time, etc. Next, the treated surface of the inner copper foil is covered with a synthetic resin such as a chlorine-containing bolt O~o, OS4 7 enol resin, epoxy resin, unsaturated Bo-11 ester resin, Bo-11 imide resin, fluorinated resin, etc. .

被検I−の厚みは好ましくは0.01〜iffが望まし
い。
The thickness of the test object I- is preferably 0.01 to iff.

樹脂含浸基材の樹脂としてはフェノール樹脂、クレゾー
ル樹脂、エポキシ樹脂、不飽和ポリエステル樹脂、メラ
ミン樹脂、ポリイミド樹脂、ポリフェニレンオキサイド
樹脂、弗化樹脂等の合成樹脂を用A、該樹脂をガラス、
アスベスト等の無機繊維やポリエステル、ポリアミド、
ポリビニルアルコール、ポリウレタン、ポリイミド等の
有機合成17N雄や木綿等の天然繊維の織布、不織布、
マリト、ネー・ト、寒冷紗、紙等の基材に乾燥後の樹脂
量が40〜60%になるように含浸、乾燥してなる厚み
0.01〜1關の樹脂含浸基材で所要枚数を介在させる
ものである。なお樹脂含浸基材の樹脂についても塩素含
有誓を0〜0.os%にすることは更に好ましくハこと
である。外層材としては銅箔、アルミニウム箔、ニーj
ケル箔等のような金属箔や片面金4張積層板を用いるも
のである。積層一体化手段につ1ハではプレス、ロール
、ダブルベルト等のヨウな積層手段であればよく、特に
限定するものではない。
As the resin for the resin-impregnated base material, synthetic resins such as phenol resins, cresol resins, epoxy resins, unsaturated polyester resins, melamine resins, polyimide resins, polyphenylene oxide resins, and fluorinated resins are used.
Inorganic fibers such as asbestos, polyester, polyamide,
Woven fabrics and non-woven fabrics made of organic synthetic 17N male materials such as polyvinyl alcohol, polyurethane, and polyimide, and natural fibers such as cotton;
The required number of sheets is made by impregnating and drying base materials such as marito, net, cheesecloth, and paper so that the amount of resin after drying is 40 to 60%. It is something to intervene. The chlorine content of the resin impregnated base material is also 0 to 0. It is more preferable to set it to os%. Outer layer materials include copper foil, aluminum foil, and aluminum foil.
A metal foil such as Kel foil or a 4-layer gold-clad laminate on one side is used. The laminating and integrating means may be any suitable laminating means such as a press, roll, double belt, etc., and is not particularly limited.

以下本発明を実施例にもとづいて説明する。The present invention will be explained below based on examples.

実施例 厚さ0.035gmの鋼箔を有する厚さI KMの両面
鋼張ガラス布基材エポキシ樹脂内層材を、下記組成の処
理液で60゛CにおAて40秒間処理した。
EXAMPLE A double-sided steel-clad glass cloth base epoxy resin inner layer material having a thickness of I KM and having a steel foil having a thickness of 0.035 gm was treated with a treatment solution having the following composition at 60°C and A for 40 seconds.

過硫酸カリウム        69/1水酸化ナトリ
ウム      32g/7!1次に内I軸材の上下に
塩素含を盪g、o1%の硬化剤含有エボやシ樹脂ワニス
を塗布厚がQ、05flになるように塗布、乾燥後、内
層材の上下に樹脂含有量45cI)の厚さ0.IIII
+のエポキシ樹脂含浸ガラス布基材を夫々2枚づつ介し
て厚さ0.035 屑罵の鋼箔を配役した積層体を成形
圧力40kQ/d、  160℃で90分間加熱加圧成
形して4ノ一回路配線基板を得た。
Potassium persulfate 69/1 Sodium hydroxide 32g/7!1 Next, apply chlorine-containing to the top and bottom of the inner I shaft material, and apply Evo or resin varnish containing O1% hardening agent so that the thickness is Q, 05 fl. After drying, coat the inner layer material with a resin content of 45 cI and a thickness of 0. III
A laminate of 0.035-thick steel foil with two epoxy resin-impregnated glass cloth substrates interposed between each was heated and pressure-molded at a molding pressure of 40 kQ/d at 160°C for 90 minutes. A circuit wiring board was obtained.

比゛較例1 実施例の処理液を亜塩素酸す) IIウム2of/1に
変えた以外は実施例と同様に処理して4層回路配線基板
を得た。
Comparative Example 1 A four-layer circuit wiring board was obtained by processing in the same manner as in the example except that the treatment solution in the example was changed to 2 of 1 chlorite (chlorite).

比較例2 実施例の処理液を過硫酸カリウム15971  に変え
た以外は実施例と同様に処理して4層回路配線基板を得
た。
Comparative Example 2 A four-layer circuit wiring board was obtained in the same manner as in the example except that the treatment liquid in the example was changed to potassium persulfate 15971.

実施例及び比較例1と2の4層回路配線基板の性能は第
1表のようである。
The performances of the four-layer circuit wiring boards of Examples and Comparative Examples 1 and 2 are shown in Table 1.

〔発明の効果〕〔Effect of the invention〕

本発明は上述した如く構成されている。特許請求の範囲
第1項に記載した構成を有する多J−配線基板の製造方
法においては、内層鋼箔の耐酸性、半田耐熱性、内層鋼
箔の接着性が著るしく向上する効果を有している。
The present invention is constructed as described above. The method for manufacturing a multi-J wiring board having the structure described in claim 1 has the effect of significantly improving the acid resistance of the inner layer steel foil, the soldering heat resistance, and the adhesiveness of the inner layer steel foil. are doing.

Claims (1)

【特許請求の範囲】[Claims] (1)内層銅箔を過硫酸カリウムと水酸化ナトリウムと
の混合溶液で処理後、該表面を塩素含有量が0〜0.0
5重量%の合成樹脂で被覆してから、樹脂含浸基材を介
して外層材と積層一体化することを特徴とする多層配線
基板の製造方法。
(1) After treating the inner layer copper foil with a mixed solution of potassium persulfate and sodium hydroxide, the surface is treated with a chlorine content of 0 to 0.0.
A method for producing a multilayer wiring board, which comprises coating the board with 5% by weight of synthetic resin and then laminating and integrating the board with an outer layer material via a resin-impregnated base material.
JP8341588A 1988-04-05 1988-04-05 Manufacture of multilayer interconnection substrate Pending JPH01255297A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8341588A JPH01255297A (en) 1988-04-05 1988-04-05 Manufacture of multilayer interconnection substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8341588A JPH01255297A (en) 1988-04-05 1988-04-05 Manufacture of multilayer interconnection substrate

Publications (1)

Publication Number Publication Date
JPH01255297A true JPH01255297A (en) 1989-10-12

Family

ID=13801806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8341588A Pending JPH01255297A (en) 1988-04-05 1988-04-05 Manufacture of multilayer interconnection substrate

Country Status (1)

Country Link
JP (1) JPH01255297A (en)

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