JPH01241810A - Composite laminated ceramic structure - Google Patents

Composite laminated ceramic structure

Info

Publication number
JPH01241810A
JPH01241810A JP63070599A JP7059988A JPH01241810A JP H01241810 A JPH01241810 A JP H01241810A JP 63070599 A JP63070599 A JP 63070599A JP 7059988 A JP7059988 A JP 7059988A JP H01241810 A JPH01241810 A JP H01241810A
Authority
JP
Japan
Prior art keywords
dielectric
layer
mixture
green sheet
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63070599A
Other languages
Japanese (ja)
Inventor
Yuzo Shimada
嶋田 勇三
Takatada Tomioka
孝忠 冨岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63070599A priority Critical patent/JPH01241810A/en
Publication of JPH01241810A publication Critical patent/JPH01241810A/en
Pending legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To obtain a composite laminated ceramic structure of high quality generating no delamination crack by arranging mixture layers of an insulator and a dielectric between an insulating layer and a dielectric layer in order to ease up thermal stress generated at the time of sintering and cooling. CONSTITUTION:The mixture layers 11-13 placed between the insulating layers 2 and the dielectric layers 1 are the mixture of insulating composition and dielectric composition. The weight ratio of an insulator to a dielectric is 80:20 in the mixture layer I 11, 50:50 in the mixture layer II 12 and 20:80 in the mixture layer III 13. Raw material powder is mixed with an organic solvent and an organic inverter to make slurry and a green sheet on a polyethylene film. A ceramic green sheet of the insulator, a green sheet of the dielectric and a green sheet of the mixture of an insulating material and a dielectric material are respectively made for being cut in a prescribed shape respectively so that the respective ceramic green sheet pieces are made. Next, after being laminated and put into a press metal mold, thermal fixing press is performed and a raw laminate is cut in a prescribed shape followed by debinder treatment and sintering so as to obtain a composite lamination ceramic structure.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は異種材料を複合化した複合積層セラミ横遺体に
関し、特に焼結収縮性または熱膨張性が異なるセラミッ
ク材料を均一に複合化した複合積層セラミック構造体に
関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a composite laminated ceramic horizontal body made of a composite of different materials, and particularly to a composite made of a uniform composite of ceramic materials having different sintering shrinkage properties or thermal expansion properties. The present invention relates to a laminated ceramic structure.

〔従来の技術〕[Conventional technology]

従来コンデンサは配線層を設けたセラミック等の基板上
に、配線導体間に配置してはんだ付けなどして電子回路
を形成していた。しかし、この方法では、チップ型また
は、円板型のコンデンサはそれぞれ1個つつ取付けられ
ねばならない。
Conventionally, capacitors have been formed by forming an electronic circuit on a substrate made of ceramic or the like provided with a wiring layer, disposed between wiring conductors, and soldered. However, in this method, one chip type or disk type capacitor must be installed.

一方近年、ハイフリット技術によりコンデンサ等を含む
電子回路を基板内部に形成することが試みられている。
On the other hand, in recent years, attempts have been made to form electronic circuits including capacitors and the like inside substrates using high frit technology.

すなわち、アルミナ等のセラミック基板にスクリーン印
刷法により誘電体層とコンデンサ用内部電極とを交互に
形成し、次いてその上に基板表面となる絶縁J34を形
成して焼成し、コンデンサを構成している。しかしこの
場合、各パターンを印刷する工程が多くなり作業性か悪
くなる欠点があった。また誘電体材料の誘電率が小さい
こと、さらに印刷積層をくり返すに従い印刷部の平面性
か非常に悪くなり積層数を増やずことが困難であること
により大きな容量をもつコンデンサを形成することは不
可能であった。
That is, a dielectric layer and an internal electrode for a capacitor are alternately formed on a ceramic substrate made of alumina or the like by a screen printing method, and then an insulating layer J34 which becomes the surface of the substrate is formed thereon and fired to form a capacitor. There is. However, in this case, there is a drawback that the number of steps for printing each pattern increases, resulting in poor workability. In addition, the dielectric constant of the dielectric material is small, and as printing layers are repeated, the flatness of the printed area becomes extremely poor, making it difficult to increase the number of layers, making it difficult to form capacitors with large capacitance. was impossible.

このように、従来の混成集積回路等の複合部品では、限
られたセラミック等の絶縁基板上に、高密度に素子を実
装することは限界があった。
As described above, in conventional composite components such as hybrid integrated circuits, there is a limit to mounting elements at high density on a limited number of insulating substrates such as ceramics.

そこで高密度、高集積化をはかるため、絶縁体基板中に
抵抗体やコンデンサを納めて積層した構造を持つ新しい
複合積層セラミック構造体が開発されつつある。
Therefore, in order to achieve higher density and higher integration, new composite laminated ceramic structures are being developed that have a laminated structure in which resistors and capacitors are housed within an insulating substrate.

この複合積層セラミック構造体の一例を第2図に示す。An example of this composite laminated ceramic structure is shown in FIG.

この例は所定の誘電率をもつ誘電体層1にコンデンサの
電極層3を形成し、これらを積層してコンデンサを実現
し、最外層の絶縁体層2の1枚には外面に外部回路との
接続用の外部パッド電極6を設け、この外部パッド電極
6とコンデンサの電極層3との間を中間層の絶縁体層2
に他の部品、配線等と共に設けられた引出し導体4及び
接続パターン配線5により、これら絶縁体層2.誘電体
層1を積層して接続する構造となっている。これら誘電
体層1及び絶縁体層2を形成する誘電体材料、絶縁体材
料は、互いに異なる性質を有していることは言うまでも
ない。
In this example, a capacitor electrode layer 3 is formed on a dielectric layer 1 having a predetermined dielectric constant, and a capacitor is realized by laminating these layers, and one of the outermost insulating layers 2 has an external circuit on its outer surface. An external pad electrode 6 for connection is provided, and an intermediate insulating layer 2 is provided between the external pad electrode 6 and the electrode layer 3 of the capacitor.
These insulator layers 2. It has a structure in which dielectric layers 1 are stacked and connected. It goes without saying that the dielectric material and insulator material forming the dielectric layer 1 and the insulator layer 2 have different properties.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の複合積層セラミック構造体は、積層され
た誘電体層1.絶縁体層2が互いに異なる性質を有する
誘電体材料、絶縁体材料により形成される構成となって
いるので、各材料の微妙な収縮率の差や異質材料間の相
互拡散により、絶縁体層2と誘電体層lとの界面て剥離
やクラックなどの現象が生じ易く、品質の安定性及び信
頼性を阻害するという欠点があった。
The conventional composite laminated ceramic structure described above includes laminated dielectric layers 1. Since the insulator layer 2 is formed of dielectric materials and insulator materials that have different properties, the insulator layer 2 Phenomena such as peeling and cracking tend to occur at the interface between the dielectric layer 1 and the dielectric layer 1, which has the drawback of impairing quality stability and reliability.

また、焼結後の冷却過程およびはんだ処理等の熱処理の
際、それぞれの材料て熱膨張係数が異なっていることに
よるクラック等の発生などの欠点があった。
In addition, during the cooling process after sintering and during heat treatment such as soldering, there were drawbacks such as the occurrence of cracks due to the different thermal expansion coefficients of the respective materials.

本発明の目的は、絶縁体層と誘電体層との界面での剥離
やクラックの発生を防止し、品質の安定性、信頼性の向
上をはかることができる複合積層セラミック構造体を提
供することにある。
An object of the present invention is to provide a composite laminated ceramic structure that can prevent peeling and cracking at the interface between an insulator layer and a dielectric layer, and improve quality stability and reliability. It is in.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、セラミック絶縁材料と誘電体材料からなる複
合積層セラミック構造体において、前記誘電体材料が鉛
を含み、かつ、前記セラミック絶縁材料で形成された層
と前記誘電体材料で形成された層の間に前記セラミック
絶縁材料と前記誘電体材料との混合物から成る層が形成
され、その混合比率が前記セラミック絶縁材料で形成さ
れた層から見て前記誘電体材料が段階的に増加する構成
になるよう少くとも2種類の混合層から形成されている
The present invention provides a composite laminated ceramic structure made of a ceramic insulating material and a dielectric material, in which the dielectric material contains lead, and a layer formed of the ceramic insulating material and a layer formed of the dielectric material. A layer made of a mixture of the ceramic insulating material and the dielectric material is formed between the layers, and the mixture ratio is such that the amount of the dielectric material increases in stages when viewed from the layer made of the ceramic insulating material. It is formed from a mixed layer of at least two types so that

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示す積層成形前の断面図で
ある。
FIG. 1 is a cross-sectional view of an embodiment of the present invention before lamination molding.

第1の実施例は、第1図に示す絶縁体層2は酸化アルミ
ニウムを40〜60 w t%、酸化鉛を1〜40wt
%、酸化ケイ素を2〜40wt%1M化ホウ素を1〜3
0 w t%、■族元素酸化物を0.05〜25 w 
t%、■族元素(ただし炭素、ケイ素、鉛は除く)の酸
化物を0.01〜]、 Ow t%で合計100 w 
t%となるような組成の900℃程度で焼結できる無機
粉末を使用した。また、誘電体層1は、P b (M 
n I/3.N b 2/3)o、o+ (M g I
/2・W I/2)0.645 T i 0−3450
3を組成とする900℃程度で焼結出来る複合ペロブス
カイト系高誘電体材料粉末を使用した。
In the first embodiment, the insulating layer 2 shown in FIG. 1 contains 40 to 60 wt% of aluminum oxide and 1 to 40 wt% of lead oxide.
%, silicon oxide 2-40wt% 1M boron oxide 1-3
0 wt%, 0.05 to 25 w of group ■ element oxide
t%, oxides of group ■ elements (excluding carbon, silicon, and lead) from 0.01%], Ow t%, total 100 w
An inorganic powder that can be sintered at about 900° C. and has a composition of 1.5 t % was used. Further, the dielectric layer 1 has P b (M
n I/3. N b 2/3) o, o+ (M g I
/2・W I/2) 0.645 T i 0-3450
A composite perovskite-based high dielectric material powder having a composition of No. 3 and which can be sintered at about 900° C. was used.

一方、絶縁体層2と誘電体層1の間に挟む混合層11〜
13は、前記に示した絶縁組成と誘電体組成を混合した
ものである。具体的には、混合層Illは絶縁体対誘電
体が重量比パーセントで80対20.混合層1112は
50対50.混合層■13は20対80であった。
On the other hand, the mixed layer 11 to be sandwiched between the insulating layer 2 and the dielectric layer 1
No. 13 is a mixture of the insulating composition and dielectric composition shown above. Specifically, the mixed layer Ill has a weight ratio of insulator to dielectric of 80:20. The mixed layer 1112 has a ratio of 50:50. Mixed layer (13) had a ratio of 20:80.

次に、この実施例の製造方法について説明する。一般に
、セラミッククリーンシートを得るには、原料粉末を有
機溶剤および有機バインダと混合しスラリーを得る。こ
のスラリーをキャスティング製膜法によポリエチレンフ
ィルム上にグリーンシートを作成する。グリーンシート
の厚みは6一 50〜100μmである。
Next, the manufacturing method of this example will be explained. Generally, to obtain a ceramic clean sheet, raw material powder is mixed with an organic solvent and an organic binder to obtain a slurry. This slurry is used to form a green sheet on a polyethylene film using a casting method. The thickness of the green sheet is 6-50 to 100 μm.

前記方法を用いて絶縁体のセラミッククリーンシート、
誘電体のクリーンシートおよび絶縁桐料と誘電体材料と
の混合物のクリーンシートを各々作製し、それぞれ所定
の形状に切断し、各セラミッククリーンシート片を作製
する。ここて用いる誘電体材料は誘電率か約1500〜
3000程度の範囲にあり、大容量のコンデンサを形成
するためには有利である。
Ceramic clean sheet of insulator using the above method,
A dielectric clean sheet and a clean sheet of a mixture of insulating paulownia material and dielectric material are each produced and cut into a predetermined shape to produce each ceramic clean sheet piece. The dielectric material used here has a dielectric constant of about 1500~
It is in the range of about 3000, which is advantageous for forming a large capacitance capacitor.

次に、第1図に示した構造になるように積層し、プレス
金型に投入後熱圧着プレスを行なう。
Next, they are laminated so as to have the structure shown in FIG. 1, put into a press mold, and subjected to thermocompression pressing.

プレス圧着された生積層体を所定の形状に切断後、脱ハ
インタ処理を500 ’C前後の温度て行ない、850
°C〜1000°C程度の温度で焼結することにより複
合積層セラミック構造体を得た。
After cutting the press-bonded green laminate into a predetermined shape, deintering treatment is performed at a temperature of around 500'C, and
A composite laminated ceramic structure was obtained by sintering at a temperature of about 1000°C to 100°C.

第2の実施例は、第1の実施例に示した3種類の混合!
11,12.13のかわりに絶縁体対誘電体が重量比パ
ーセントて95対5,80対20.60対40,4.0
対60.20対80の5種類の混合層を用いた。これら
のクリーンシートの製造方法は、第1の実施例と同様で
あるか、クリーンシート厚みを50μmにそれぞれ統一
した。これらの5種類のクリーンシートを絶縁体層2と
誘電体層1の間に挟み込むが、この際、絶縁体層2から
みて混合層は、誘電体材料が段階的に増加するように配
置されている。
The second example is a mixture of the three types shown in the first example!
11, 12. Instead of 13, the weight ratio of insulator to dielectric is 95 to 5, 80 to 20.60 to 40, 4.0
Five types of mixed layers were used: 60:20:80. The manufacturing method of these clean sheets was the same as that of the first example, or the thickness of each clean sheet was unified to 50 μm. These five types of clean sheets are sandwiched between the insulating layer 2 and the dielectric layer 1. At this time, the mixed layer is arranged so that the dielectric material increases in stages when viewed from the insulating layer 2. There is.

この構造の場合、500℃の脱ハインタ′工程および8
50°C〜900℃の焼結温度て処理しても、デラミネ
ーションやクラックか発生ぜず、高信頼な複合積層セラ
ミック構造体が得られた。内部に形成された誘電体は誘
電率2500を示し、大容量コンデンサの実現か可能で
ある。一方、絶縁体層は75の誘電率を示し、信号配線
を形成する際、十分高速化が期待てきる。
In the case of this structure, a 500°C deintering step and an 8
Even when processed at a sintering temperature of 50° C. to 900° C., no delamination or cracks occurred, and a highly reliable composite laminated ceramic structure was obtained. The dielectric material formed inside has a dielectric constant of 2500, making it possible to realize a large capacitance capacitor. On the other hand, the insulator layer exhibits a dielectric constant of 75, and is expected to sufficiently speed up the formation of signal wiring.

第3の実施例は、前記第1y)実施例で用いた絶縁体層
2のかわりに絶縁体95重量パーセントと誘電体5重量
パーセン1〜の混音物からなる層を用いた。
In the third embodiment, in place of the insulating layer 2 used in the first embodiment (1y), a layer made of a mixture of 95 weight percent insulator and 5 weight percent dielectric was used.

この場合、絶縁体層の誘電率は0と比較的小さな値とな
り信号配線に対しても十分てあった。当然ながらデラミ
ネーションやクラックの発生は無く、高品質の構造体か
得られた。
In this case, the dielectric constant of the insulating layer was a relatively small value of 0, which was sufficient for signal wiring. Naturally, there was no delamination or cracking, and a high-quality structure was obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、絶縁体層と誘電体層の間
に焼結および冷却の際に発生する熱ストレスを緩和する
ため、絶縁体と誘電体の混合物層を配置することにより
、デラミネーションクラックの発生しない高品質な複合
積層セラミック構造体を得ることかてきる効果かある。
As explained above, the present invention provides a method for disposing a mixture layer of an insulator and a dielectric between the insulator layer and the dielectric layer in order to alleviate the thermal stress generated during sintering and cooling. It is possible to obtain a high quality composite laminated ceramic structure without lamination cracks.

【図面の簡単な説明】 第1図は本発明の一実施例を示す積層成形前の断面図、
第2図は従来の複合積層セラミック構造体の一例を示す
積層成形前の断面図である。 1・誘電体層、2・絶縁体層、3・コンデンサの電極層
、4・・引出し導体、5・接続パターン配線、6・・外
部パッド電極、11〜13・混合層。 代理人 弁理士  内 原  音 一9≧ 第 j 図 1 誘電4本層 2    、李rtAし¥ζイレトン詠マフ1  混合
@T 12、混合層■ 1.3  混@臀丁
[Brief Description of the Drawings] Figure 1 is a cross-sectional view of an embodiment of the present invention before lamination molding;
FIG. 2 is a cross-sectional view of an example of a conventional composite laminated ceramic structure before lamination molding. 1. Dielectric layer, 2. Insulator layer, 3. Electrode layer of capacitor, 4. Output conductor, 5. Connection pattern wiring, 6. External pad electrode, 11 to 13. Mixed layer. Agent Patent Attorney Otoichi Uchihara 9≧ No. j Figure 1 Dielectric 4 layers 2, Lee rtA and \ζ Ireton eimuff 1 Mixed @ T 12, Mixed layer ■ 1.3 Mixed @ Buttocho

Claims (1)

【特許請求の範囲】[Claims] セラミック絶縁材料と誘電体材料からなる複合積層セラ
ミック構造体において、前記誘電体材料が鉛を含み、か
つ、前記セラミック絶縁材料で形成された層と前記誘電
体材料で形成された層の間に前記セラミック絶縁材料と
前記誘電体材料との混合物から成る層が形成され、その
混合比率が前記セラミック絶縁材料で形成された層から
見て前記誘電体材料が段階的に増加する構成になるよう
少くとも2種類の混合層から形成されていることを特徴
とする複合積層セラミック構造体。
In a composite laminated ceramic structure made of a ceramic insulating material and a dielectric material, the dielectric material contains lead, and the layer between the layer formed of the ceramic insulating material and the layer formed of the dielectric material is A layer made of a mixture of a ceramic insulating material and the dielectric material is formed, and the mixing ratio is at least such that the amount of the dielectric material increases in stages from the layer made of the ceramic insulating material. A composite laminated ceramic structure characterized by being formed from two types of mixed layers.
JP63070599A 1988-03-23 1988-03-23 Composite laminated ceramic structure Pending JPH01241810A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63070599A JPH01241810A (en) 1988-03-23 1988-03-23 Composite laminated ceramic structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63070599A JPH01241810A (en) 1988-03-23 1988-03-23 Composite laminated ceramic structure

Publications (1)

Publication Number Publication Date
JPH01241810A true JPH01241810A (en) 1989-09-26

Family

ID=13436190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63070599A Pending JPH01241810A (en) 1988-03-23 1988-03-23 Composite laminated ceramic structure

Country Status (1)

Country Link
JP (1) JPH01241810A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465107A (en) * 1990-07-05 1992-03-02 Murata Mfg Co Ltd Laminated composite part
EP1320286A3 (en) * 2001-12-13 2005-01-05 Harris Corporation Electronic module including a low temperature co-fired ceramic (LTCC) substrate with a capacitive structure embedded therein and related methods

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62139393A (en) * 1985-12-13 1987-06-23 日本電気株式会社 Composite laminated ceramic parts

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62139393A (en) * 1985-12-13 1987-06-23 日本電気株式会社 Composite laminated ceramic parts

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465107A (en) * 1990-07-05 1992-03-02 Murata Mfg Co Ltd Laminated composite part
EP1320286A3 (en) * 2001-12-13 2005-01-05 Harris Corporation Electronic module including a low temperature co-fired ceramic (LTCC) substrate with a capacitive structure embedded therein and related methods

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