JPH0120511B2 - - Google Patents

Info

Publication number
JPH0120511B2
JPH0120511B2 JP11488483A JP11488483A JPH0120511B2 JP H0120511 B2 JPH0120511 B2 JP H0120511B2 JP 11488483 A JP11488483 A JP 11488483A JP 11488483 A JP11488483 A JP 11488483A JP H0120511 B2 JPH0120511 B2 JP H0120511B2
Authority
JP
Japan
Prior art keywords
data
address
bit
memory
storage element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11488483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS607678A (ja
Inventor
Akira Jinsaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58114884A priority Critical patent/JPS607678A/ja
Publication of JPS607678A publication Critical patent/JPS607678A/ja
Publication of JPH0120511B2 publication Critical patent/JPH0120511B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
JP58114884A 1983-06-25 1983-06-25 メモリ構成方式 Granted JPS607678A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58114884A JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58114884A JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Publications (2)

Publication Number Publication Date
JPS607678A JPS607678A (ja) 1985-01-16
JPH0120511B2 true JPH0120511B2 (fr) 1989-04-17

Family

ID=14649079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58114884A Granted JPS607678A (ja) 1983-06-25 1983-06-25 メモリ構成方式

Country Status (1)

Country Link
JP (1) JPS607678A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4796222A (en) * 1985-10-28 1989-01-03 International Business Machines Corporation Memory structure for nonsequential storage of block bytes in multi-bit chips
JP2531162B2 (ja) * 1986-12-25 1996-09-04 ソニー株式会社 ビツトブロツクの転送方法
JP2944084B2 (ja) * 1988-04-14 1999-08-30 日本電気株式会社 シリアル入出力回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817582A (ja) * 1981-07-06 1983-02-01 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 多重ワ−ド・メモリのデ−タ蓄積およびアドレス指定方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5817582A (ja) * 1981-07-06 1983-02-01 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 多重ワ−ド・メモリのデ−タ蓄積およびアドレス指定方式

Also Published As

Publication number Publication date
JPS607678A (ja) 1985-01-16

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