JPH01200651A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the step coverage by a method wherein a titanium silicide layer and an aluminum layer are laminated and formed on the surface including an opening part for contact use made in an interlayer insulating film and a heat treatment at a high temperature near the melting point of aluminum is executed so that the aluminum layer can be filled into the fine opening part for contact use. CONSTITUTION:A diffusion region 2 is formed selectively on the surface of a semiconductor substrate 1 ; an interlayer insulating film 3 is formed on the surface of the semiconductor substrate 1 including the diffusion region 2. Then, the interlayer insulating film 3 on the diffusion region 2 is etched selectively; an opening part 4 for contact use of the diffusion region 2 is formed. Then, a titanium silicide layer 5 with a thickness of 0.15mum and an aluminum layer 6 with a thickness of 1.5mum are deposited one after another on the surface including the opening part 4 by a sputtering method. Then, this assembly is heat-treated in an atmosphere of argon gas at 1 atmospheric pressure and at a temperature of 550-660 deg.C; the step coverage of the opening part 4 is improved.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

Conventional techniques for forming metal wiring in semiconductor devices include providing an interlayer insulating film on a semiconductor substrate on which an element region is provided, selectively etching the interlayer insulating film to form a contact opening for the element region, and etching the interlayer insulating film to include the opening. An aluminum layer or an aluminum alloy layer is deposited on the surface, selectively etched, and heat treated at 400 to 500°C in a hydrogen or nitrogen atmosphere to connect the element region of the opening and to the interlayer insulation crotch. It formed an extended metal wiring.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, the step coverage of the opening (hereinafter referred to as step coverage) is determined by the performance of the film deposition apparatus. Step coverage has been improved by improving equipment and optimizing film forming conditions, but as semiconductor devices become more highly integrated, the step shape becomes steeper, especially in IM bits where the contact opening size is 1 μm x 1 μm or less. Above D
In highly integrated semiconductor devices such as RAM, conventional wiring formation techniques have poor step coverage of openings and do not allow a sufficient amount of metal to enter the openings during metal wiring formation, resulting in wiring breakage due to steps and There are problems in that the yield and reliability of the device are lowered.

[Means for solving problems]

A method of manufacturing a semiconductor device according to the present invention includes the steps of providing an insulating film on a semiconductor substrate having a semiconductor element region and selectively etching the insulating film to form a contact opening in the element region, and a surface including the opening. The method includes the steps of sequentially depositing a high melting point metal silicide layer and an aluminum layer, and heat-treating in an inert gas.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(c) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1(a), a diffusion region 2 is selectively provided on the surface of a semiconductor substrate 1, and a glabellar insulating film 3 is formed on the surface of the semiconductor substrate 1 including the diffusion region 2. Next, the interlayer insulating film 3 is selectively etched on the diffusion region 2 to form a contact opening 4 in the diffusion region 2.

Next, as shown in FIG. 1(b), a titanium silicide layer 5 with a thickness of 0.1 to 5 μm and a titanium silicide layer 5 with a thickness of 1.5 μm are formed on the surface including the opening 4.
An aluminum layer 6 having a thickness of .mu.m is sequentially deposited by sputtering.

Next, as shown in Figure 1(c),
A heat treatment is performed for 20 minutes in an argon gas atmosphere at ~660°C to improve the step coverage of the opening 4.

FIGS. 2(a) to 2(e) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a second embodiment of the present invention.

As shown in FIG. 2(a), a gate electrode 8 is selectively provided on the gate insulating film 7 provided on the surface of the semiconductor substrate 1,
A diffusion region 9 is provided in the semiconductor substrate 1 in alignment with the gate electrode 8, and a diffusion region 2 is selectively provided as in the first embodiment. Next, an interlayer insulating film 3 is formed on the surface including these element regions, and the interlayer insulating film 3 is selectively etched to provide contact openings 4 for the diffusion regions 2 and 9.

Next, as shown in FIG. 2(b), a titanium silicide layer 5 with a thickness of 0.15 μm and a titanium silicide layer 5 with a thickness of 1.0 μm are formed on the surface including the opening 4.
m aluminum layers 6 are sequentially deposited by sputtering.

Next, as shown in Fig. 2(c),
The aluminum layer 6 is filled into the opening 6 by heat treatment for 30 minutes in an argon gas atmosphere at atmospheric pressure.

Next, as shown in FIG. 2(d), a resist film (not shown) is applied and the entire surface is dry-etched to flatten the surface of the aluminum layer 6.

Next, as shown in FIG. 2(e), an aluminum layer 1o is deposited by a sputtering method.
.

〔Effect of the invention〕

As explained above, the present invention provides a laminated titanium silicide layer and an aluminum layer on the surface including the contact opening provided in the interlayer insulating film, and enables high-temperature heat treatment near the melting point of aluminum. The contact rain opening can be filled with an aluminum layer and the step coverage can be improved by up to 50% compared to 20% in the conventional example. Furthermore, the flatness of the aluminum wiring can be similarly improved, which has the effect of improving the yield and reliability of highly integrated semiconductor devices.

[Brief explanation of the drawing]

FIGS. 1(a) to (c) and FIGS. 2(a) to (e) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first and second embodiments of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Diffusion region, 3... Interlayer insulating film, 4... Opening, 5... Titanium silicide layer, 6...
...Aluminum layer 1.7...Gate insulating film, 8...
- Gate electrode, 9...diffusion region, 10...aluminum layer.

Claims (1)

[Claims] A step of providing an insulating film on a semiconductor substrate having a semiconductor element region and selectively etching the insulating film to form a contact opening for the element region, and forming a high melting point metal silicide layer and an aluminum layer on the surface including the opening. A method for manufacturing a semiconductor device, comprising the steps of sequentially depositing and heat-treating in an inert gas.