JPH01186659A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH01186659A
JPH01186659A JP488488A JP488488A JPH01186659A JP H01186659 A JPH01186659 A JP H01186659A JP 488488 A JP488488 A JP 488488A JP 488488 A JP488488 A JP 488488A JP H01186659 A JPH01186659 A JP H01186659A
Authority
JP
Japan
Prior art keywords
oxide film
film
silicon
silicon nitride
nitride film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP488488A
Other languages
Japanese (ja)
Inventor
Koichi Kato
弘一 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP488488A priority Critical patent/JPH01186659A/en
Publication of JPH01186659A publication Critical patent/JPH01186659A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To enable an element separation area with less defects for achieving highly integrated semiconductor by forming a silicon nitride film after introducing a large amount of phosphor into oxide film on a silicon substrate. CONSTITUTION:An oxide film 202 and an oxide film 203 including phosphor are formed on a silicone substrate 201. Then, it is left at a high temperature for a specified amount of time and phosphor is diffused into the lower-layer thermal oxide film 202. Then, after performing etching elimination of the oxide film 203 including phosphor, a silicon nitride film 204 is formed, an organic resist film 205 is formed, and a resist film at the element separation area 205 is eliminated. With the remaining resist as a mask, the silicon nitride film 204 and the silicon oxide film 202 are opened 206, the organic resist 205 is eliminated, and the silicon substrate is subject to wet oxidation at a high temperature. The silicon oxide film 202 directly below the silicon nitride film 204 becomes soft due to high temperature and relaxes expansion of volume by viscosity flow, and reduces stress for the silicon substrate 201. It allows an element area with less defects to be formed and high integration of semiconductor element to be achieved.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は半導体装置の製造方法に係り、特に半導体上に
形成される素子を分離する領域の製造方法の改良に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a method for manufacturing a region for separating elements formed on a semiconductor.

(従来の技術) 周知の如く、素子を分離する領域としては半導体の熱酸
化膜が従来用いら九でおり、これを形成する方法として
は、シリコン窒化膜をマスクとしてシリコン窒化膜が被
覆されていない領域を熱酸化して素子分離領域を形成す
る方法が広く用いられている。この技術によると、シリ
コン窒化膜端部においては、第2図に示すように、シリ
コン窒化膜103が硬いため、酸化されて体積が膨張し
た熱酸化膜102が応力により変形していく。変形する
ことにより熱酸化膜中の応力は緩和されていくが、これ
と同時に半導体基板101へも応力の影響が広がり、半
導体中に無数の欠陥を発生していた。
(Prior Art) As is well known, a semiconductor thermal oxide film has conventionally been used as a region for separating elements, and the method for forming this is to use a silicon nitride film as a mask and cover it with a silicon nitride film. A widely used method is to form an element isolation region by thermally oxidizing a region that does not exist. According to this technique, as shown in FIG. 2, at the end of the silicon nitride film, since the silicon nitride film 103 is hard, the thermal oxide film 102, which has been oxidized and expanded in volume, is deformed by stress. The stress in the thermal oxide film is alleviated by the deformation, but at the same time, the influence of stress spreads to the semiconductor substrate 101, causing countless defects in the semiconductor.

このため、半導体の素子領域の周辺には素子として用い
ることのできない領域が生成され、実効的に半導体素子
の高集積化を下げる原因となっていた。
For this reason, a region that cannot be used as a device is generated around the semiconductor device region, which effectively reduces the degree of integration of semiconductor devices.

(発明が解決しようとする課題) 以上述べたように熱酸化膜により素子分離領域を形成す
る方法では、半導体の高集積化が妨げられている。そこ
で、製造方法を改良し、高集積化が可能な素子分離方法
を提供することを目的としている。
(Problems to be Solved by the Invention) As described above, the method of forming element isolation regions using thermal oxide films hinders high integration of semiconductors. Therefore, it is an object of the present invention to improve the manufacturing method and provide an element isolation method that enables high integration.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 上記目的を達成するために1本発明においては、シリコ
ン基板上の酸化膜中にリンを多量に導入した後、シリコ
ン窒化膜を形成し、シリコン窒化膜の開口部下の熱酸化
膜を除去した後、熱酸化膜を形成することを特徴として
いる。
(Means for Solving the Problems) In order to achieve the above object, in the present invention, a large amount of phosphorus is introduced into an oxide film on a silicon substrate, a silicon nitride film is formed, and an opening in the silicon nitride film is formed. It is characterized by forming a thermal oxide film after removing the thermal oxide film below.

(作  用) シリコン酸化膜中にリンを導入して高温にすると、シリ
コン酸化膜は軟化するため、シリコン窒化膜直下の酸化
膜は粘性流動するごとにより、体積の膨張を緩和し、シ
リコン基板に対する応力を軽減し、欠陥の発生を妨げる
。このため、欠陥の少ない素子領域が形成され、半導体
素子の高集積化が可能となる。
(Function) When phosphorus is introduced into a silicon oxide film and the temperature is raised, the silicon oxide film becomes soft, so the oxide film directly under the silicon nitride film undergoes viscous flow, which alleviates the volumetric expansion and increases the resistance to the silicon substrate. Reduces stress and prevents defects from occurring. Therefore, an element region with fewer defects is formed, and higher integration of semiconductor elements becomes possible.

(実 施 例) 以下1本発明の効果を実施例を用いながら説明する。(Example) The effects of the present invention will be explained below using examples.

第1図は実施例を説明するための工程図である。FIG. 1 is a process diagram for explaining an example.

まず、第1図(a)に示すようにたとえばn型シリコン
基板201上に熱酸化により酸化膜202を500人を
形成する。この上にリンを含む酸化膜203を公知の気
相成長法により3000人形成する(第1図(b))。
First, as shown in FIG. 1(a), for example, an oxide film 202 of 500 layers is formed on an n-type silicon substrate 201 by thermal oxidation. An oxide film 203 containing phosphorus is formed thereon by a known vapor phase growth method (FIG. 1(b)).

この後、950℃の高温に1時間放置し、酸化膜203
に含まれるリンを下層の熱酸化膜へ拡散する。リンを含
む酸化膜203を公知のエツチング技術により除去した
後、公知の気相成長法によりシリコン窒化膜204を2
000人形成する。この上に有機レジスト膜205を形
成しく第1図(C))、公知の光露光、現象技術により
、素子分離領域のレジスト膜を除去する。残されたレジ
ストをマスクとして、公知の異方性反応エツチングによ
り、シリコン窒化膜、シリコン酸化膜を開口206シ、
さらに有機レジスト膜を除去する(第1図(d))、そ
こで、1000℃の湿式酸化によりシリコン基板を酸化
する(第1図(c))、シリコン窒化膜直下のシリコン
酸化膜は高温により軟化するので、粘性流動をおこす。
After this, the oxide film 203 is left at a high temperature of 950°C for 1 hour.
The phosphorus contained in the phosphorus is diffused into the underlying thermal oxide film. After removing the phosphorus-containing oxide film 203 using a known etching technique, a silicon nitride film 204 is removed using a known vapor phase growth method.
Form 000 people. An organic resist film 205 is formed thereon (FIG. 1C), and the resist film in the element isolation region is removed by known light exposure and development techniques. Using the remaining resist as a mask, the silicon nitride film and silicon oxide film are formed into openings 206 by known anisotropic reaction etching.
Furthermore, the organic resist film is removed (Fig. 1 (d)), and the silicon substrate is then oxidized by wet oxidation at 1000°C (Fig. 1 (c)). The silicon oxide film directly under the silicon nitride film is softened by the high temperature. This causes viscous flow.

このため、シリコン窒化膜に覆われないシリコン式基板
上の酸化膜は体積膨張をおこすが、シリコン窒化膜直下
のシリコン酸化膜はほとんど形状が変化しない。このた
め、素子分離のための中間的領域も小さくなり、シリコ
ン基板中への応力の影響も少なくすることのできる。こ
うして、欠陥の少ない素子領域が形成することが可能と
なる。
Therefore, although the oxide film on the silicon type substrate that is not covered with the silicon nitride film expands in volume, the shape of the silicon oxide film directly under the silicon nitride film hardly changes. Therefore, the intermediate region for element isolation becomes smaller, and the influence of stress on the silicon substrate can also be reduced. In this way, an element region with fewer defects can be formed.

また、本発明に用いたシリコン酸化膜へのリンの導入法
は固相からの拡散に限られるものでなく、イオン注入な
どあらゆる方法の利用が考えられる。
Further, the method of introducing phosphorus into the silicon oxide film used in the present invention is not limited to diffusion from a solid phase, and various methods such as ion implantation can be used.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明によれば、欠陥の少ない素子
領域の形成が可能となり、半導体素子の高集積化を実現
することが可能となる。
As described above, according to the present invention, it is possible to form an element region with few defects, and it is possible to realize highly integrated semiconductor elements.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明での一実施例の製造工程を示す断面図、
第2図は従来の素子分離法による製造工程の断面図であ
る。 101、201・・・シリコン基板。 102、202・・・シリコン酸化膜、103、204
・・・シリコン窒化膜、203・・・リンガラス、  
 205・・・有機レジスト膜、206・・・開口。 第1図
FIG. 1 is a sectional view showing the manufacturing process of an embodiment of the present invention;
FIG. 2 is a cross-sectional view of a manufacturing process using a conventional element isolation method. 101, 201...Silicon substrate. 102, 202... silicon oxide film, 103, 204
... silicon nitride film, 203 ... phosphorus glass,
205...Organic resist film, 206...Opening. Figure 1

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上にリンを10^1^9cm^−^2以上
含んだシリコン酸化膜を形成し、この上にシリコン窒化
膜を形成した後、シリコン窒化膜に開口部を設け、その
開口部に面するシリコン酸化膜を除去し、露出した半導
体表面を熱酸化することを特徴とした半導体装置の製造
方法。
After forming a silicon oxide film containing 10^1^9 cm^-^2 or more of phosphorus on a semiconductor substrate and forming a silicon nitride film on this, an opening is formed in the silicon nitride film, and a surface is formed in the opening. 1. A method of manufacturing a semiconductor device, which comprises removing a silicon oxide film and thermally oxidizing the exposed semiconductor surface.
JP488488A 1988-01-14 1988-01-14 Manufacture of semiconductor device Pending JPH01186659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP488488A JPH01186659A (en) 1988-01-14 1988-01-14 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP488488A JPH01186659A (en) 1988-01-14 1988-01-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH01186659A true JPH01186659A (en) 1989-07-26

Family

ID=11596104

Family Applications (1)

Application Number Title Priority Date Filing Date
JP488488A Pending JPH01186659A (en) 1988-01-14 1988-01-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH01186659A (en)

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