JPS59167035A - Formation of interelement isolation region - Google Patents

Abstract

PURPOSE:To prevent a birdbeak phenomenon of an isolation insulating film from generating at an interelement isolating region on a semiconductor substrate by a method wherein a groove part is formed in the interelement isolating region and irradiation of light and developing are performed, after the insulating film and a positive type photo resist film were formed on the semiconductor substrate. CONSTITUTION:A nitriding Si film 3 is coated on an Si substrate 1 and, after that, a groove part 5 is formed in an interelement isolating region 11. Then, after a resist film 4 was removed, an insulating film 6 is deposited on the substrate 1 according to a thin film deposition method. After a positive type photo resist 7 is applied thereon, light 10 is irradiated on the resist 7. The resist 7 irradiated by the light 10 is removed by performing a developing treatment. By this method, the resist 7 on the region 11 is left without being removed when the developing treatment was performed. After then, the film 6 is removed by using the remained resist 7 as the mask. After the remained resist 7 was removed, concavities 8 in the region 11 are embedded in with a thermal oxide film 9 by performing a thermal oxidation according to a high-pressure oxidation method, etc., and the region 11 can be flattened. According to this method, no birdbeak phenomenon of an oxide film generates, because there is no process to make the region 11 oxidize for a long time.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an element isolation technique used when manufacturing semiconductor elements such as MO8 type transistors in an integrated manner, and particularly relates to an element isolation technique that causes bird's beak to occur in an element isolation region. The present invention relates to a method for forming isolation between elements, which allows isolation to be performed without any problems.

[Prior art]

2. Description of the Related Art Conventionally, methods for forming isolation between elements used when manufacturing semiconductor elements such as MO8 type transistors in an integrated manner are shown in FIGS. 1(G) to 1(2).

In the figure, (1) is a semiconductor substrate such as silicon, (
2) is a silicon oxide film, (3) is a silicon nitride film, and (4) is a silicon nitride film.
) is a resist), (11) u element isolation region, (12) is an activation region, (13) is an isolation oxide film formed by selective oxidation in the element isolation region (11), (21) is isolation oxidation. This is a hanging region of the oxide film in the shape called a bird's beak that was created during the formation of the film (13).

The device isolation method conventionally used is to form an active region (12) on a silicon substrate (1) and a silicon nitride film (3).
) and then selectively oxidized by coating (4) to (2).
). First, silicon substrate (1
) 1t of silicon oxide on top! (2) After forming e, a silicon oxide film (3) is completely formed (FIG. 1(A)). The reason why the silicon oxide film (2) is formed under the silicon nitride film (3) is to alleviate stress caused by the difference in thermal expansion coefficient between the semiconductor substrate (1) and the silicon nitride film (3). be. Thereafter, the region corresponding to the activated region (12) is coated with a resist (4)v (FIG. 103)), and then this resist (4)'fI: is used as a mask to cover the silicon nitride film (
3) Etch it (Fig. 1(C)). Then, for example, thermal oxidation treatment is performed for a long time in a high temperature oxygen atmosphere to form an isolation oxide film (13) (FIG. 10)). in this way,
An active region (1) covered with a silicon nitride film (3)
2) has little oxygen diffusion and hardly reacts with the silicon substrate, and the isolation region (11) without the silicon nitride film (3) reacts with oxygen to form the isolation oxide film (13). It is formed.

However, in such conventional device isolation methods, the isolation oxide film formed by selective oxidation is raised on the substrate by about 1/2 of the thickness of the isolation oxide film, and at the same time, the edges of the silicon nitride film are separated from the isolation oxide film. The film sinks in, forming a hanging region of the oxide film called a bird's beak. For example, when an isolation oxide film with a thickness of 1 μm is formed, the amount of this intrusion (bird's beak) is approximately 0.5 μm at both ends. For this reason, very large scale integrated circuits, such as 256K +
1M beep) RA? It becomes difficult to miniaturize and increase density in semiconductor elements such as No. 11. Furthermore, since the isolation oxide film is raised higher than the active region, there is also the drawback that the wiring pattern is likely to break off at the stepped portion.

[Summary of the invention]

In view of the above points, the present invention has been made in order to solve the conventional drawbacks.The purpose of the present invention is to reduce the penetration of the isolation insulating film in the isolation region between elements, and to make the entire isolation insulating film flat. It is an object of the present invention to provide a method for forming isolation between elements, which can achieve miniaturization and high density of semiconductor elements.

In order to achieve such an object, the present invention includes a step of forming a resist in a region outside the device isolation region on a semiconductor substrate, and a step of etching the device isolation region using this resist as a mask to form a groove. a step of forming an insulating film on the semiconductor substrate by a thin film deposition method such as a CVD method or a sputtering method after removing the above-mentioned regimen) 1; and a step of applying a positive resist on the insulating film and then applying a resist to the resist. A step of performing energy irradiation, a step of completely developing and removing the irradiated positive resist, and a step of removing the positive resist remaining on the element isolation region by using a mask to remove the insulating film using a plasma or wet chemical method. The etching step and the step of removing the remaining positive resist and then performing thermal oxidation by high-pressure oxidation or the like are performed in the above order, and will be explained in detail below using examples.

[Embodiments of the invention]

Figures 2 to 2 are cross-sectional views showing a method for forming a thermally oxidized film in an embodiment of the present invention.
The same or corresponding parts as in the figures are given the same reference numerals.

After coating a resist for light or EB (electron beam) (not shown) on the substrate on which the oxidized silicon film (3) is formed on the silicon substrate (1),
11) is irradiated with light or an electron beam and developed to completely remove the resist in this area.Then, using the remaining resist as a mask, the silicon substrate (1)' is etched by RIE (reactive ion etching) or the like. A groove portion (5) having a concave cross section is entirely formed in the element isolation region (11). In this case, fluorine-based gas is often used for etching. For example, in order to etch 0.54m,
Using (CF4 + 02) gas, 13 Pa, 0
．． It is necessary to perform etching for about 5 minutes under the condition of 5 W/cwt2. Next, the resist is completely removed from the silicon substrate (1) etched in this way, and then C.
A silicon oxide film (6) as an insulating film is deposited on a silicon substrate (1) by a low-temperature thin film deposition method such as a VD method, a sputtering method, or a dEB deposition method (as shown in Fig. 2).
). At this time, the thickness of the silicon oxide film (6) is made to be approximately the same as the depth of the etching groove (5) formed in the element isolation region (11) of the silicon substrate (1), but this groove is thicker than this. Therefore, it will take on a corresponding shape.

Next, a positive EB resist (7) such as PMrviA is applied onto the silicon substrate (1) on which the silicon oxide film (6) is formed, and then this silicon substrate (1) is coated with a positive EB resist (7) such as PMrviA.
The entire upper surface is irradiated with an electron beam (10>V) as a charged particle beam (Fig. 2 (0). At this time, the electron beam (10) is sufficiently incident on the resist (7) outside the element isolation region. The electron beam is irradiated so that it reaches the bottom, but does not reach the bottom in the element isolation region, but reaches approximately the same depth as the surface of the silicon oxide film (6).Next, the electron beam is irradiated and solubilized. positive type EB register) (7) t
-By developing and removing, the inter-element isolation region (
11) Positive EB resist (7) remains only on top (second
Figure (6)). Next, this remaining positive EB resist (
7) Using a mask, the silicon oxide wX(6)' is removed by plasma etching or wet chemical etching (FIG. 2(g)). At this time, when using the plasma etching method, use a (CF4 + H2) mixed gas, and when using the wet chemical etching method, use HF.
A liquid or the like may be used, and in order to completely remove the oxide film on the active region (12), it is necessary to perform etching slightly overly.

Therefore, as shown in FIG.
) will be etched. Note that reference numeral (8) indicates a depression in the element isolation region (11) created by this overetching.

Next, in order to fill in the holes (8) in this edge portion, the resist (7) remaining on the element isolation region (11) is removed (FIG. 2(b)), and then the resist (7) in FIG. As shown in Figure 2, by performing oxidation for a short time using a high-pressure oxidation method or the like, the recess (8) is filled with a thermal oxide film (9), forming a layer that flattens the isolation region (11). .

In the present invention, since there is no step of oxidizing the isolation region between elements at high temperature for a long time, the phenomenon of oxide film penetration (bird's beak) occurs.
does not occur. In other words, conventional isolation oxide film formation requires 10
Compared to high-temperature processing at around 00°C, in the case of this method, insulating films such as silicon oxide films are
Since it is carried out at a low temperature of 0°C to 800°C, and around 100°C in the case of vapor deposition, problems caused by conventional methods do not occur. The insulating film of silicon oxide film formed by the CVD method or vapor deposition method is applied to the m part (
The thickness may be approximately the same as the depth in 5). A large, concave adhesive part (5) is formed on the inter-element isolation region (11), and the thickness of this groove part is about 1 cyst compared to other parts.
．． It is about 5 to 2 times thicker, for example IIf, PMMA.
If 1.5 μm of resist is applied, the thickness #'i of the resist remaining on the element isolation region (11) will be 2.0 to 2.5 μm. Here, for example, an electron beam (EB) w 10 KV
If you irradiate about 5×1O-5C/2, the EB will be about 1.5.
Inter-element isolation region (11) to reach a depth of μm
All of the resist outside the top, down to the bottom, becomes soluble in the developer. And this inter-element molecule! By performing the above-described etching using the resist remaining on the region (11) as a mask, the entire element isolation region is formed. In this case, it is technically difficult to finish the etching when the active region (12) and the isolation region (11) have become flat;
Normally, etching will be done slightly over-etching. Therefore, in the present invention, by filling in the gaps in the inter-element region caused by etching (symbol (8) in FIG. can be formed. Note that the isolation region between elements (
The depressions (8) in 11) are small, and the oxidation time may be short.

Note that although the above embodiments have been described using a substrate in which a silicon nitride film is formed on a silicon substrate (1), this silicon nitride film may be omitted. In addition to the silicon oxide film, the isolation insulating film formed on the semiconductor substrate may be any insulating film that can be formed into a thin film at low temperatures, and a thin thermal oxide film of 500% or less may be applied as a base. It's okay. Furthermore, similar effects can be obtained by using, in addition to an electron beam, an ion beam or light irradiation as a charged particle beam for energy irradiation.

〔Effect of the invention〕

As explained above, according to the method for forming element isolation of the present invention, a groove is formed in an element isolation region on a semiconductor substrate, and a silicon oxide film or the like is formed on the semiconductor substrate by a thin film deposition method at low temperature. After forming an insulating film, applying a positive resist on the insulating film, irradiating the resist with energy, and performing a development process, the insulating film is etched using the resist remaining in the element isolation region as a mask. By removing the resist and performing thermal oxidation using high-pressure oxidation, it is possible to eliminate the bird's beak caused by conventional methods, thereby reducing the amount of penetration of the isolation insulating film, and thereby improving the performance of semiconductors such as VLSIs. It becomes possible to increase the density of elements. In addition, the depressions in the isolation region created by over-etching can be filled with a thermal oxide film.
A flat isolation oxide film can be obtained, the surface of the semiconductor substrate can be flattened, and there is an effect that the occurrence of disconnections in the wiring pattern can be prevented.

[Brief explanation of the drawing]

FIGS. 1(2) to (2) are process cross-sectional views showing a conventional method for forming an isolation oxide film, and FIGS. 2(4) to (Q) show a method for forming an isolation oxide film in an embodiment of the present invention. It is a cross-sectional view of the process. (1)...Silicon substrate, (3)...Silicon oxide film, (5)...Groove portion, (6)...Silicon oxide film (insulating film). ), (7)... Positive EB resist, (8)... Recess in element isolation region, (9)...
・・Thermal oxidation 1ffl, (10,)・・・・Electron beam (
EB), (11)... element isolation region, (12)...
...Activation area. Agent Makoto Kuzuno - Figure 1 Figure 2 Figure 2

Claims (6)

[Claims] (1) A step of forming a resist in a region outside the device isolation region on the semiconductor substrate, a step of etching the device isolation region using a thick resist as a mask to form a groove, and a step of removing the resist and then etching the device isolation region. A step of forming an insulating film on a semiconductor substrate by a thin film deposition method such as a CVD method or a sputtering method, a step of applying energy to the resist after applying a positive resist '2 on the insulating film, and a step of irradiating the resist with energy. A step of developing and removing the positive molding,
A step of etching the insulating film using a positive-type resistor mask remaining on the isolation region between the elements, and a process of etching the insulating film using a plasma or #i Miraet chemical, and a high-pressure oxidation process after removing the remaining positive-type resistor. A method for forming isolation between elements, which is characterized in that it consists of a step of thermal oxidation using a method such as a thermal oxidation process. (2) The method for forming element isolation according to claim 1, wherein the semiconductor substrate is a silicon substrate having a silicon nitride film formed on its main surface. (3) The method for forming element isolation according to claim 1 or 2, wherein the insulating film is a silicon oxide film. (4) The device according to any one of claims 1 to 3, wherein the thickness of the insulating film outside the device isolation region is approximately the same as the depth of the etched groove. How to form a separation. (5) The method for forming isolation between elements according to any one of claims 1 to 4, characterized in that a thin thermal oxide film is used as an insulating deoxidizing base. (6) The method for forming isolation between elements according to any one of claims 1 to 5, wherein the positive resist is an EB resist. σ) Rest mineral for EB The thickness is such that the energy irradiation of the charged particle beam reaches the bottom outside the inter-element isolation region, and the thickness is such that it cannot reach the bottom in the inter-element isolation region. A method for forming isolation between elements according to claim 6.