JPH0115102B2 - - Google Patents

Info

Publication number
JPH0115102B2
JPH0115102B2 JP58246673A JP24667383A JPH0115102B2 JP H0115102 B2 JPH0115102 B2 JP H0115102B2 JP 58246673 A JP58246673 A JP 58246673A JP 24667383 A JP24667383 A JP 24667383A JP H0115102 B2 JPH0115102 B2 JP H0115102B2
Authority
JP
Japan
Prior art keywords
service processor
processing unit
input
central processing
channel device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58246673A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60142764A (ja
Inventor
Katsuo Yoshida
Koichi Ikeda
Nobuo Funakubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP24667383A priority Critical patent/JPS60142764A/ja
Publication of JPS60142764A publication Critical patent/JPS60142764A/ja
Publication of JPH0115102B2 publication Critical patent/JPH0115102B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
JP24667383A 1983-12-29 1983-12-29 計算機インタフエ−ス方式 Granted JPS60142764A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24667383A JPS60142764A (ja) 1983-12-29 1983-12-29 計算機インタフエ−ス方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24667383A JPS60142764A (ja) 1983-12-29 1983-12-29 計算機インタフエ−ス方式

Publications (2)

Publication Number Publication Date
JPS60142764A JPS60142764A (ja) 1985-07-27
JPH0115102B2 true JPH0115102B2 (enExample) 1989-03-15

Family

ID=17151909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24667383A Granted JPS60142764A (ja) 1983-12-29 1983-12-29 計算機インタフエ−ス方式

Country Status (1)

Country Link
JP (1) JPS60142764A (enExample)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583246B2 (ja) * 1978-08-09 1983-01-20 富士通株式会社 デ−タ処理システム
JPS6024495B2 (ja) * 1980-12-26 1985-06-13 富士通株式会社 インタフェ−ス制御方式
JPS57111763A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Device connecting system of multi-system

Also Published As

Publication number Publication date
JPS60142764A (ja) 1985-07-27

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