JPH01128493A - 多層配線基板の製造方法 - Google Patents
多層配線基板の製造方法Info
- Publication number
- JPH01128493A JPH01128493A JP62286205A JP28620587A JPH01128493A JP H01128493 A JPH01128493 A JP H01128493A JP 62286205 A JP62286205 A JP 62286205A JP 28620587 A JP28620587 A JP 28620587A JP H01128493 A JPH01128493 A JP H01128493A
- Authority
- JP
- Japan
- Prior art keywords
- conductive pattern
- resin
- film
- metal foil
- via hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000011347 resin Substances 0.000 claims abstract description 33
- 229920005989 resin Polymers 0.000 claims abstract description 33
- 239000011888 foil Substances 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 5
- 238000009713 electroplating Methods 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 17
- 239000011889 copper foil Substances 0.000 abstract description 12
- 238000004080 punching Methods 0.000 abstract description 2
- 238000002788 crimping Methods 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62286205A JPH01128493A (ja) | 1987-11-12 | 1987-11-12 | 多層配線基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62286205A JPH01128493A (ja) | 1987-11-12 | 1987-11-12 | 多層配線基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01128493A true JPH01128493A (ja) | 1989-05-22 |
JPH0450760B2 JPH0450760B2 (enrdf_load_stackoverflow) | 1992-08-17 |
Family
ID=17701327
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62286205A Granted JPH01128493A (ja) | 1987-11-12 | 1987-11-12 | 多層配線基板の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01128493A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH036096A (ja) * | 1989-06-02 | 1991-01-11 | Matsushita Electric Works Ltd | 回路基板 |
JPH04250694A (ja) * | 1991-01-28 | 1992-09-07 | Matsushita Electric Works Ltd | 多層回路板の製造方法 |
-
1987
- 1987-11-12 JP JP62286205A patent/JPH01128493A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH036096A (ja) * | 1989-06-02 | 1991-01-11 | Matsushita Electric Works Ltd | 回路基板 |
JPH04250694A (ja) * | 1991-01-28 | 1992-09-07 | Matsushita Electric Works Ltd | 多層回路板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPH0450760B2 (enrdf_load_stackoverflow) | 1992-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5081562A (en) | Circuit board with high heat dissipations characteristic | |
JP4365061B2 (ja) | 回路形成基板製造方法及び回路形成基板 | |
JP3093960B2 (ja) | 半導体回路素子搭載基板フレームの製造方法 | |
JPH01128493A (ja) | 多層配線基板の製造方法 | |
JP2717200B2 (ja) | 電子部品搭載用基板におけるオーバーレイめっきの形成方法 | |
JPH05218606A (ja) | 回路装置 | |
JPH08222828A (ja) | プリント配線板及びその製造方法 | |
JP3095857B2 (ja) | 電子部品搭載用基板 | |
JP3050253B2 (ja) | 多層電子部品搭載用基板の製造方法 | |
JPH06177277A (ja) | 半導体装置の製造方法 | |
JP7555206B2 (ja) | 印刷配線板の製造方法 | |
JPH0831976A (ja) | シリコン両面実装基板及びその製造方法 | |
JP2884271B2 (ja) | 両面tabの製造方法 | |
JPH1117059A (ja) | ボールグリッドアレイ基板及びその連続体 | |
JP3795219B2 (ja) | 両面配線フィルムキャリアテープの製造方法 | |
JP2795475B2 (ja) | プリント配線板及びその製造方法 | |
JPS63260198A (ja) | 多層回路板の製造方法 | |
JP2005136339A (ja) | 基板接合方法およびその接合構造 | |
JPH1070365A (ja) | 多層回路基板の製造方法 | |
JP2004072027A (ja) | 突起電極付き配線基板の製造方法 | |
JP2000294905A (ja) | パッケージ用配線板の製造方法 | |
JPH0438159B2 (enrdf_load_stackoverflow) | ||
JPH0691310B2 (ja) | 配線基板の製造方法 | |
JPH10178141A (ja) | 複合リードフレーム及びその製造方法 | |
JP2666569B2 (ja) | 半導体搭載用リード付き基板の製造法 |