JPH01120356U - - Google Patents

Info

Publication number
JPH01120356U
JPH01120356U JP1474488U JP1474488U JPH01120356U JP H01120356 U JPH01120356 U JP H01120356U JP 1474488 U JP1474488 U JP 1474488U JP 1474488 U JP1474488 U JP 1474488U JP H01120356 U JPH01120356 U JP H01120356U
Authority
JP
Japan
Prior art keywords
resin sheet
insulating resin
integrated circuit
inner lead
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1474488U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1474488U priority Critical patent/JPH01120356U/ja
Publication of JPH01120356U publication Critical patent/JPH01120356U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は一実施例を示す平面図、第2図は第1
図のA−A線位置での断面図、第3図は他の実施
例を示す断面図、第4図は従来の実装体を示す平
面図、第5図は第4図のB―B線位置での断面図
である。 1…ICチツプ、3…リード、3a…インナー
リード、4,4a…絶縁性樹脂シート、7…ワイ
ヤ、8…封止用プラスチツク。
FIG. 1 is a plan view showing one embodiment, and FIG. 2 is a plan view showing one embodiment.
3 is a sectional view showing another embodiment, FIG. 4 is a plan view showing a conventional mounting body, and FIG. 5 is a sectional view taken along line BB in FIG. 4. It is a sectional view at the position. DESCRIPTION OF SYMBOLS 1... IC chip, 3... Lead, 3a... Inner lead, 4, 4a... Insulating resin sheet, 7... Wire, 8... Plastic for sealing.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] インナーリードの下側から絶縁性樹脂シートが
接着され、その絶縁性樹脂シート上に半導体集積
回路装置チツプが接着され、前記インナーリード
と前記半導体集積回路装置チツプ間にワイヤボン
デイングが施こされ、プラスチツクにて封止され
ている実装体。
An insulating resin sheet is bonded from the bottom of the inner lead, a semiconductor integrated circuit device chip is bonded onto the insulating resin sheet, wire bonding is performed between the inner lead and the semiconductor integrated circuit device chip, and the plastic Mounted body sealed with .
JP1474488U 1988-02-05 1988-02-05 Pending JPH01120356U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1474488U JPH01120356U (en) 1988-02-05 1988-02-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1474488U JPH01120356U (en) 1988-02-05 1988-02-05

Publications (1)

Publication Number Publication Date
JPH01120356U true JPH01120356U (en) 1989-08-15

Family

ID=31226220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1474488U Pending JPH01120356U (en) 1988-02-05 1988-02-05

Country Status (1)

Country Link
JP (1) JPH01120356U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6151953A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor device
JPS62269325A (en) * 1986-05-16 1987-11-21 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6151953A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor device
JPS62269325A (en) * 1986-05-16 1987-11-21 Mitsubishi Electric Corp Semiconductor device

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