JPH0356151U - - Google Patents
Info
- Publication number
- JPH0356151U JPH0356151U JP11627089U JP11627089U JPH0356151U JP H0356151 U JPH0356151 U JP H0356151U JP 11627089 U JP11627089 U JP 11627089U JP 11627089 U JP11627089 U JP 11627089U JP H0356151 U JPH0356151 U JP H0356151U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- lead
- assembled
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の一実施例の封止樹脂体を透視
して示した斜視図、第２図は従来の樹脂封止型混
成集積回路の封止樹脂体を透視して示した斜視図
である。
１……混成集積回路基板、２，３……リード、
２ａ……内部リード、４……半導体チツプ、５…
…ボンデイングワイヤ、６……封止樹脂体。
FIG. 1 is a perspective view of an encapsulating resin body according to an embodiment of the present invention, and FIG. 2 is a perspective view of a conventional resin-encapsulated hybrid integrated circuit. It is. 1... Hybrid integrated circuit board, 2, 3... Lead,
2a...Internal lead, 4...Semiconductor chip, 5...
...bonding wire, 6... sealing resin body.
Claims (1)
ード付け組立をし樹脂封止した混成集積回路にお
いて、前記リードの前記封止樹脂体内に位置する
平面状内部リードの一部分が垂直に曲げられた垂
直部を有することを特徴とする混成集積回路。 In a hybrid integrated circuit that is assembled with leads on a hybrid integrated circuit board using a lead frame and sealed with resin, a part of the planar inner lead of the lead located in the sealing resin body is bent vertically to form a vertical portion. A hybrid integrated circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11627089U JPH0356151U (en) | 1989-10-02 | 1989-10-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11627089U JPH0356151U (en) | 1989-10-02 | 1989-10-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0356151U true JPH0356151U (en) | 1991-05-30 |
Family
ID=31664552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11627089U Pending JPH0356151U (en) | 1989-10-02 | 1989-10-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0356151U (en) |
-
1989
- 1989-10-02 JP JP11627089U patent/JPH0356151U/ja active Pending