JPH01104720U - - Google Patents
Info
- Publication number
- JPH01104720U JPH01104720U JP1988000405U JP40588U JPH01104720U JP H01104720 U JPH01104720 U JP H01104720U JP 1988000405 U JP1988000405 U JP 1988000405U JP 40588 U JP40588 U JP 40588U JP H01104720 U JPH01104720 U JP H01104720U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- island
- semiconductor
- integrated circuit
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Description
第１図は、本考案の一実施例を示す半導体集積
回路装置の主要部の断面図である。
１……モールド樹脂、２……半導体チツプ、３
……リード、４……アイランド（チツプサイズよ
り小さい領域でマウントできる構造を有する）、
５……ボンデイングワイヤー、６……空隙。
FIG. 1 is a sectional view of the main parts of a semiconductor integrated circuit device showing one embodiment of the present invention. 1...Mold resin, 2...Semiconductor chip, 3
...Lead, 4...Island (has a structure that can be mounted in an area smaller than the chip size),
5...Bonding wire, 6...Void.
Claims (1)
し、かつチツプサイズよりも小さい領域でチツプ
がアイランドにマウントされていることを特徴と
する半導体集積回路装置。 1. A semiconductor integrated circuit device characterized in that there is a gap around a semiconductor chip sealed in a mold, and the chip is mounted on an island in an area smaller than the chip size.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988000405U JPH01104720U (en) | 1988-01-05 | 1988-01-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988000405U JPH01104720U (en) | 1988-01-05 | 1988-01-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01104720U true JPH01104720U (en) | 1989-07-14 |
Family
ID=31199401
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988000405U Pending JPH01104720U (en) | 1988-01-05 | 1988-01-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01104720U (en) |
-
1988
- 1988-01-05 JP JP1988000405U patent/JPH01104720U/ja active Pending