JPH01118938A - Measurement system for program comprehension rate - Google Patents

Abstract

PURPOSE:To accurately grasp the degree of evaluation of a program to be evaluated by applying a system where the ratio is measured for the instructions carried out at least once or more during evaluation of said program. CONSTITUTION:A system comprises an input device 1 which performs the input operations, a program comprehension rate measuring device 2, a CPU 3, a main memory 4, and an output device 5. The executed instruction area information is successively stored in the executing process of a program PR to be evaluated by means of a branch instruction. Then the ratio of the executed instructions of the PR is calculated after execution of the PR based on the stored executed instruction area information. Thus the ratio of the number of executed instructions is measured as a program comprehension rate. In such a way, the degree of evaluation of the PR can be accurately grasped. Furthermore a module searching part 28 works only when the first address conversion is carried out in the same program module. Thus the address converting time is shortened.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for measuring program coverage in a computer system, and in particular, when a program to be evaluated consisting of a plurality of modules is executed, at least one
This invention relates to a method for measuring the ratio of instructions executed more than once to the total number of instructions.

[Conventional technology]

When developing a new program, check whether the program achieves its intended purpose or not! In order to confirm the program, the program is evaluated using test data.

Normally, in evaluating this program, the person in charge of evaluation considers several evaluation items in advance to cover all instructions in the program to be evaluated, conducts tests on these evaluation items, and finds results that are satisfactory in all evaluation items. When this was obtained, the evaluation was considered complete.

[Problem that the invention seeks to solve]

However, it is extremely difficult to think of evaluation items in advance that can cover all the instructions in the program to be evaluated, and therefore it is considered that the evaluation of the program to be evaluated is complete when all the evaluation items that have been considered in advance are satisfied. The problem was that it was impossible to say.

The present invention has been made in view of these circumstances,
The purpose of this is to provide a method for measuring the ratio of instructions that are executed at least once during the evaluation of a program to be evaluated, thereby making it possible to accurately determine the degree of evaluation of the program to be evaluated. It is in.

[Means for solving problems]

In order to achieve the above object, the present invention executes a branch instruction in a program in response to the setting of a branch instruction interrupt mode, and sets a pre-branch address and a post-branch address before the first instruction after the branch is executed. In a computer system that has a branch instruction interrupt mechanism that maintains a branch instruction and generates an internal interrupt, the computer system is composed of one or more modules existing in main memory based on absolute addresses, and the module is placed at the beginning of all modules. Module destination that indicates the beginning and includes the module name! ! Search for the evaluation target program to which the identification word has been added, obtain the name of the module included in the module start identification word of the module including the absolute address as the module name of interest, and also obtain the start address and end address of the module. module search means for obtaining and storing in the conversion control information storage means; If it is included, the absolute address is converted into a module name and a relative address within the module using the module name of the module of interest and the module start address, and the module is included. address conversion means for converting the absolute address into a module name and an intra-module relative address according to newly obtained information by activating the module search means when the module search means is not available; and post-branch address storage means for storing the post-branch address. ; Executed instruction area information storage means; When an internal interrupt occurs by the branch instruction interrupt mechanism, a pre-branch address held in the branch instruction interrupt mechanism; and a post-branch address stored in the post-branch address storage means. mi storing the range indicated by the address in the executed instruction area information storage means as executed instruction area information, and storing the post-branch address held in the branch instruction interrupt mechanism in the post-branch address storage means; rate measurement control means; instruction word analysis means for obtaining addresses of all instruction words of the evaluation target program on main memory; addresses of all instruction words of the evaluation target program obtained by the instruction word analysis means; Based on the executed instruction area information stored in the executed instruction area information storage means, the ratio of executed instructions in the evaluation target program is calculated as the program coverage rate and output from the output device, and the executed instructions and unexecuted instructions are calculated as the program coverage rate. and measurement result editing output control means for outputting from the output device an address of the command word converted by the address conversion means into a module name and an intra-module relative address so that the command can be identified.

[Effect]

When a branch instruction in the program to be evaluated is executed, the branch instruction interrupt mechanism holds the pre-branch address and post-branch address and generates an internal interrupt. When this internal interrupt occurs, the coverage measurement control means executes the range indicated by the pre-branch address held in the branch instruction interrupt mechanism and the previous post-branch address stored in the post-branch address storage means. The executed instruction area information is stored in the executed instruction area information storage means, and the post-branch address currently held by the branch instruction interrupt mechanism is stored in the post-branch address storage means. Such processing is performed every time a branch instruction in the program to be evaluated is executed, and as a result, when the program to be evaluated finishes execution, information indicating the area of executed instructions in the area of the program to be evaluated is It will be stored in the completed instruction area information storage means. after that,
The measurement result editing output control means edits the evaluation target program based on the addresses of all instructions of the evaluation target program obtained from the instruction word analysis means and the executed instruction area information stored in the executed instruction area information storage means. The ratio of executed instructions in is calculated as the program coverage rate, and the address of the instruction word is converted into a module name and an intra-module relative address by an address conversion means so that executed instructions and unexecuted instructions can be distinguished. is output from the output device.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the program coverage measurement method of the present invention. The program coverage measurement method of this embodiment is composed of an input device 1 for manual operation, a program coverage measurement device 2, a central processing unit 3, a main storage device 4, and an output device 5. ing.

In the central processing unit 3, in response to the setting of the branch instruction interrupt mode including the specification of the priority level during program execution,
A branch instruction that maintains the priority level, pre-branch address, and post-branch address and generates an internal interrupt before the first instruction after the branch is executed by executing a branch instruction in the program with the specified priority level. An interrupt mechanism 30 is provided. The program coverage measurement device 2 also includes an input information analysis section 20, a coverage measurement control section 21, a post-branch address storage section 22 that can store post-branch addresses for each priority level, and an executed instruction area information storage section. , a measurement result editing output control section 24 , a command analysis section 25 , a coverage calculation section 26 , an address conversion section 27 , a module search section 28 , and a conversion control information storage section 29 .

The main storage device 4 includes a plurality of modules 41.42°...
There is an evaluation target program PR consisting of modules 41, 42, 4n, and 4n. ...,
The starting address of 4n is 31, 32. . . , the Sn address, and the ending address is El, E2 . ..., En
It is a street address. Then, the start address SL of each module
S2. ..., Sn indicates the beginning of the module and the corresponding module name (aa
Module head identification words 41M, 42M, . . . , 4=nM including (aaa+bbbbb+-, nnnnn) are added.

Note that the priority level of the evaluation target program PR during program running is (11).

In addition, the conversion control information storage unit 29 of the program coverage measurement device 2 stores the module of interest in the main storage device 4 in order to quickly transform the absolute address into a module name and an intra-module relative address. Start address MS
and the end address ME are temporarily held. Note that the initial values of the module start address MS and module end address ME are zero.

Next, the operation of the program coverage measurement method of this embodiment configured as described above will be explained.

In this embodiment, the program N4 coverage rates of multiple evaluation target programs existing in the main storage device 4 can be measured individually, and the coverage rates of multiple evaluation target programs with different priority levels can be measured simultaneously. You can also do it. now,
Assume that the program coverage rate of one evaluation target program PR is measured. In this case, input bag W1
1 to the input information analysis unit 2 of the program coverage measurement device 2
The priority level of the evaluation target program PR (11) is notified to the coverage measurement control unit 21 via 0.

Upon receiving this notification, the coverage measurement control unit 21 sets the priority level (11) to the branch instruction interrupt mode and activates the branch instruction interrupt mechanism 30, and also sets the priority level (11) to the branch instruction interrupt mode and activates the branch instruction interrupt mechanism 30. The rear address is initialized to 0. After this, the evaluation target program PR in the main storage device 4 is started.

When a branch instruction is executed during execution of the evaluation target program PR, the branch instruction interrupt mechanism 30 of the central processing unit 3 receives the running priority level (l) 1 post-branch address.

The pre-branch address is held, a branch instruction interrupt is generated at the branch destination address, and the coverage measurement control section 21 of the program coverage measurement device 2 is operated.

The coverage rate measurement control unit 21 generates a branch instruction interrupt using the priority level +1+ held in the branch instruction interrupt mechanism 30, the pre-branch address which is the address of the branch instruction itself, and the post-branch address which is the branch destination of this branch instruction. Executed instruction area information storage unit 23 receives the range from the post-branch address corresponding to the priority level (1) in the post-branch address storage unit 30 to the pre-branch address received this time as executed instruction area information. At the same time, the currently received post-branch address is stored in a location within the post-branch address storage unit 22 corresponding to the currently received priority level (1). Note that the coverage measurement control unit 21 receives a notification from the branch instruction interrupt mechanism 30 at the time of the first branch instruction interrupt in which the post-branch address in the post-branch address storage unit 22 corresponding to the priority level number is initialized to zero. The post-branch address is simply stored in the post-branch address storage section 22 in correspondence with the current priority level, and the executed instruction area information is not stored in the executed instruction area information storage section 23. After performing the above operations, the coverage rate measurement control unit 21 instructs the branch instruction interrupt mechanism 30 to resume execution from the post-branch address in the evaluation target program PR, and waits for the next branch instruction interrupt.

FIG. 2 explains the operation when storing executed instruction area information in the executed instruction area information storage unit 23, taking as an example a routine from address PO to address P4 of one module 41 that constitutes the evaluation target program PR. This is a diagram. In module 41, addresses PO, PI, P
2. P3. P4 is the branch destination address (post-branch address) of the branch instruction, and addresses B1, B2 . B3. B4 is the address of the branch instruction itself (pre-branch address). First, when a branch instruction that branches to address PO of the module 41 is executed, a branch instruction interrupt is generated by the branch instruction interrupt mechanism 30, and the coverage rate is measured. The control unit 21 operates. N
4) The rate measurement control unit 21 stores the post-branch address PO notified from the branch instruction interrupt mechanism 30 in the post-branch address storage unit 22.
(Here, a description of the procedure for storing executed instruction area information before branching to address PO is omitted.)

Next, when the branch instruction at the address Bl of the module 41 is executed and a branch instruction interrupt occurs at the address P1 which is the branch destination, the coverage measurement control unit 21 receives the pre-branch address notified from the branch instruction interrupt mechanism 30. B1 and the address PO stored in the post-branch address storage unit 22 at this time in correspondence with the priority level +11 are stored in the executed instruction area information M.
1 in the executed instruction area information storage unit 23, and then the post-branch address P1 notified together with the pre-branch address Bl is set to the priority level fi+ of the post-branch address storage unit 22.
Store in the corresponding location. Similarly, address B2. B3.
By executing the branch instruction B4, addresses P2, P3, . A branch instruction interrupt occurs at P4, and the coverage measurement control unit 21 records executed instruction area information M2. M3
．． M4 is stored in the executed instruction area information storage section 23.

FIG. 3 is a diagram showing an example of the stored contents of the executed instruction area information storage section 23. As shown in FIG. The executed instruction area information storage unit 23 of this embodiment has bits that correspond one-to-one with each address of the main memory. For example, the bit of focus number 0 is stored at address O on the main memory, and the bit of bit number 100 is The bit corresponds to address 100 on main memory.

Then, the bit of the bit number corresponding to the address of the executed method instruction is turned on, and the bit corresponding to the address of the unexecuted instruction is turned off.
1 as an example, its starting address on main memory is 81.
Since the leftmost end address is address E1, the executed instruction area information of the module 41 is stored in the storage area 23-1 in the range from bit number S1 to bit number E1 of the executed instruction area information storage unit 23 in FIG. is memorized. The executed instruction area information storage area 23-1 stores executed instruction area information M1. M2. M3. M4 exists and executed instruction area information Ml, M2 . M3. All bits contained in M4 are on. Similarly, bits corresponding to other executed instruction areas of the module 41 in the executed instruction area information storage area 23-1 are also stored as executed instruction area information i1! M1. M2. M3. Like M4, it is on, and the other bits, ie, the bits corresponding to the unexecuted instruction area of module 41, are off.

Now, in FIG. 1, after the execution of the evaluation target program PR is completed, a branch instruction interrupt mode release command of priority level (1) is sent from the input device 1 via the input information analysis section 20! i
ii When the rate measurement control unit 21 is notified, the coverage rate measurement control unit 21 cancels the branch instruction interrupt mode of priority level (1) and stops the branch instruction interrupt mechanism 30, and also sets the evaluation level of priority level +11. The measurement result editing output control unit 24 is instructed to edit and output the measurement results for the target program PR.

Upon receiving this instruction, the measurement result editing output control section 24 instructs the instruction word analysis section 25 to report the addresses of all instruction words from 811th left to address En. In response to this, the instruction word analysis section 25 interprets all the instruction words from the left of No. 811 to address En, and sequentially reports the addresses of all instruction words to the measurement result editing output control section 24.

When the instruction word address is reported from the instruction word analysis section 25, the measurement result editing output control section 24 edits the bit based on the reported address and the state of the bit in the executed instruction area information storage section 23. Only addresses for which OFF is selected, that is, addresses of unexecuted instructions, are selected as addresses to be output. This selected address is an absolute address, and as described later, the address converting section 27 and module search section 28 are used to convert the absolute address into a module name and an intra-module relative address, and output them from the output device 5. do.

Furthermore, the measurement result editing output control section 24 controls the instruction word analysis section 2.
5 counts the number of instruction words that are sequentially reported, and also counts the number of times that the bit of the executed instruction area information storage area corresponding to the address of the reported instruction word is on, that is, the number of execution method instruction words. Finally, based on these count values, the mR rate calculation unit 26 calculates the ratio of the number of execution method command words to the total number of command words. Coverage rate calculation unit 2
6 calculates, for example, the number of execution method command words divided by the total number of command words in the form of a percentage, based on the above count value, and notifies the measurement result editing output control section 24 .

The measurement result editing output control unit 24 outputs this calculation result to the output device 5 as a program coverage rate for the evaluation target program 41.

Next, we will explain the operation when converting an absolute address into a module name and an intra-module relative address, assuming that the module 41
The first address S1 is 1000, and the module 4
Assuming that the start address S2 of 2 is address 1500, an example will be described in which an absolute address 1234 is to be converted.

The measurement result editing output control unit 24 uses the absolute address 1234
When converting an address, the absolute address 1234 is notified to the address conversion unit 27 to instruct conversion. When this conversion instruction is given, the address conversion unit 27 first performs
It is checked whether the absolute address 1234 is included in the module area indicated by the contents of the module start address MS and module end address ME in the conversion control information storage section 29.

Since the contents of the module start address MS and the module end address ME are both initially initialized to zero, it is initially determined that they are outside the module area. At this time, the address conversion section 27 instructs the module search section 28 to search a range of modules including the absolute address 1234.

In response to this, the module search unit 28 decrements the address one by one from the absolute address 1234 and searches for the module header identification word.

As a result, the module header identification word 41M of the module 41 starting from address 31 (1000 in the present example) is found first. When the module search unit 28 finds the module start identification word 41M, it stores the start address S1 in the conversion control information storage unit 29 as the module start address MS, and also stores the module name (aaaaa) held in the module start identification word 41M. Address conversion section 2
Notify 7. This module name is address conversion section 27
Next, the module search unit 28 uses the 1st order to find the end address.
Increase the address by 1 address from address 234 and go to the first module! ! Search for the identifier word and find address 82 (-150
When the module header identification word 42M of the module 42 starting from 0) is found, the conversion control information storage unit 2 sets address 1499, which is the calculation result of 1500-1, as the module end address ME as the end address of the module 41.
Store in 9. Then, the address conversion unit 2
Notify 7.

When the address conversion unit 27 is notified of the end of the search, the address conversion unit 27 converts the intra-module relative address 234 (=1234-31 ) address and notify the measurement result editing output control section 24 of this intra-module relative address and module name (aaaaa).

On the other hand, when a conversion instruction is given from the measurement result editing output control section 24, the notified absolute address is within the module area indicated by the contents of the module start address MS and module end address ME in the conversion control information storage section 29. , the address conversion unit 27 calculates an intra-module relative address based on the module start address MS stored in the conversion control information storage unit 29, and uses this calculated intra-module relative address and the attention The module name held as the middle module name is notified to the measurement result editing output control unit 24. As a result, as long as absolute addresses within the same module are continuously requested for address conversion, the module search section 28 operates only for the first address conversion within the same program module. This allows the time spent on address translation to be reduced.

The measurement result editing output control unit 24 performs the above processing,
This is repeated for all absolute addresses of unexecuted instructions.

The program coverage rate of the evaluation target program PR and the intra-module relative address and module name of unexecuted instructions obtained as described above are edited by the measurement result editing output control unit 24, and then are shown in FIG. 4, for example. It is output from the output device 5 in the format shown.

The above operation is an example of measuring the coverage rate of one evaluation target program, but in this embodiment, the post-branch address storage unit 22
Since post-branch addresses can be stored for each priority level, by specifying multiple priority levels from the input device 1, it is possible to simultaneously measure program coverage, etc. for evaluation target programs with multiple different priority levels. be. At this time, after the execution of the plurality of evaluation target programs is completed, branch instruction interrupt mode release commands of a plurality of priority levels are input from the input device 1, so that the N4i rate measurement control unit 21 sequentially covers the programs of each evaluation target program. This controls the calculation process of the rate and unexecuted instruction address.

〔Effect of the invention〕

As explained above, the present invention uses branch instruction interrupts to sequentially store executed instruction area information during the execution process of the evaluation target program, and after the execution of the evaluation target program is completed, the executed instruction area information is stored in the stored executed instruction area. Based on the information, the ratio of executed instructions of the program to be evaluated is calculated, without any modification to the program to be evaluated.
The ratio of the number of execution method instructions can be measured as the program coverage rate. Therefore, it is possible to accurately grasp the evaluation level of the program to be evaluated.

In addition to outputting the ratio of the number of execution method instructions of the program to be evaluated, we also output the address of the instruction word so that executed instructions and unexecuted instructions can be distinguished. It is possible to determine whether the command is an unexecuted instruction, etc.

Therefore, in the next evaluation step, evaluation can be performed focusing on unexecuted instructions, and the degree of evaluation of the program can be efficiently improved.

Furthermore, the address of an unexecuted instruction is output in a format converted into a module name and a relative address within the module, so after searching for the start address of the module from the address map output by the linker, the relative address within the module is output. There is no need for manual calculation, and it is more
It becomes possible to easily and accurately identify unexecuted instructions.

In particular, in the present invention, as long as absolute addresses within the same module are continuously requested for address translation, the module search means operates only for the first address translation within the same program module. You can reduce the amount of time you spend.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation when storing executed instruction area information in the executed instruction area information storage section 23, and FIG. 3 is an executed instruction area information storage FIG. 4 is a diagram showing an example of the storage contents of the unit 23, and FIG. 4 is a diagram showing an example of output of measurement results. In the figure, 1... Input device 2... Program coverage measurement device 3... Central processing unit 4... Main storage device 5... Output device 20... Input information analysis section 21... Coverage rate measurement control unit 22...Post-branch address storage unit 23...Executed instruction area information storage unit 24...Measurement result editing output control unit 25...Instruction word analysis unit 26...Coverage rate calculation Section 27...Address translation section 28...Module search section 29...Conversion control information storage section 30...Branch instruction interrupt mechanism 41-4n...Module 41M-4nM...Module head identification word PR...
Program to be evaluated

Claims (1)

[Claims] In response to the branch instruction interrupt mode setting, by executing a branch instruction in the program, the pre-branch address and post-branch address are held and internally stored before the first instruction after the branch is executed. In a computer system having a branch instruction interrupt mechanism that generates an interrupt, the module is composed of one or more modules existing in main memory based on an absolute address, and the beginning of the module is indicated at the beginning of all modules. Search for an evaluation target program to which a module header identifier including the name is added, obtain the module name included in the module header identifier of the module including the absolute address as the module name of interest, and obtain the module name that is the module name of interest, and obtain the module name that is included in the module header identifier of the module including the absolute address, and and a module search means for obtaining and storing an end address in the conversion control information storage means; and when an absolute address conversion request is made, the absolute address to be converted is a module start address and a module end address stored in the conversion control information storage means. Determine whether or not it is included in the indicated module of interest, and if it is included, use the module name of the module of interest and the module start address to convert the absolute address into a module name and a relative address within the module. address conversion means for converting the absolute address into a module name and an intra-module relative address according to the newly obtained information by activating the module search means when the module search means is not included; and a branch for storing the post-branch address. a subsequent address storage means; an executed instruction area information storage means; when an internal interrupt occurs by the branch instruction interrupt mechanism, a pre-branch address held in the branch instruction interrupt mechanism and a pre-branch address stored in the post-branch address storage means; The range indicated by the post-branch address is stored as executed instruction area information in the executed instruction area information storage means, and the post-branch address held in the branch instruction interrupt mechanism is stored in the post-branch address storage means. a coverage measurement control means for storing the addresses of all instruction words of the program to be evaluated on the main memory; an instruction word analysis means for obtaining addresses of all instruction words of the program to be evaluated on the main memory; and the executed instruction area information stored in the executed instruction area information storage means, calculates the ratio of executed instructions in the evaluation target program as a program coverage rate and outputs it from the output device. and measurement result editing/output control means for outputting from the output device an address of the instruction word converted by the address conversion means into a module name and an intra-module relative address so that an instruction and an unexecuted instruction can be distinguished. Features a program coverage measurement method.