JPH0795293B2 - Information processing equipment - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a program performance measuring method in an information processing system, and more particularly to a method for measuring the number of executed instructions of a program.

[Conventional technology]

Conventionally, to know the number of instruction executions of a program, which is the basis of the performance of the program, the method of calculating the number of instruction executions while predicting the execution process of the program on the desk or measuring the number of instruction executions by a hardware monitor has been used. Has been.

[Problems to be solved by the invention]

As described above, in order to calculate the number of instruction executions while predicting the execution process of a program on a desk, it is necessary to have a good understanding of the contents of the program. Even if it does, it takes a considerable amount of time. On the other hand, in the method of measuring the number of executed instructions by the hardware monitor, the preparation for the measurement is troublesome, and therefore the software personnel are not currently using it.

An object of the present invention is to provide an information processing apparatus that can easily measure the number of executed instructions without understanding the contents of the program.

[Means for solving problems]

An information processing apparatus according to the present invention that solves the above-mentioned problems of the prior art is a central processing unit that executes a program, and the head of the module that indicates the head of the module at the head of all modules that make up the program and that includes the module name. A module search means for searching the module start identification mechanism for obtaining the identification mechanism, the start addresses, end addresses and module names of all modules, and the start addresses, end addresses and module names of all modules obtained by the module search means And module range information storage means for storing the following, and branch instruction interrupt means for generating an internal interrupt when the central processing unit executes the branch instruction and notifying the pre-branch address and the branch destination address of the branch instruction. , Post-branch add that stores the post-branch address of the branch instruction For each module in the range specified by the memory storage means and the module range information storage means, the branch instruction interrupt means is activated when the internal interrupt is generated, and the branch address and the branch address stored in the branch address storage means Instruction execution number measuring means for counting the number of instructions existing within the range indicated by the pre-branch address notified from the instruction interrupt means and storing the post-branch address notified by the branch instruction interrupt means in the post-branch address storage means. It is characterized by including and.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an information processing apparatus according to an embodiment of the present invention. The information processing apparatus of this embodiment is
Input device 1 for input operation and input information analysis unit 20
And a program instruction execution number measuring device 2 including a control unit 21, a module search unit 22, an instruction word analysis unit 23, and a measurement result edit output unit 24, and before execution of a first instruction after execution of a branch instruction. A central processing unit 3 including a branch instruction interrupt mechanism 30 which holds a priority level, a pre-branch address and a post-branch address and generates an internal interrupt, and modules 41, 42,
..., main memory 4 for storing the measurement target program consisting of 4n, and post-branch addresses 51, 52 corresponding to each priority level
, 5n is stored until the next branch instruction interrupt, the post-branch address storage unit 5, the instruction execution count storage unit 6 that stores the execution count of each instruction corresponding to each module, and the measurement result of each module The output device 7 outputs a list and an instruction execution time correspondence table 8 in which instruction execution time correspondence information indicating the execution time of each instruction is stored.

The central processing unit 3 executes the measurement target program stored in the main storage device 4. As will be described later, the measurement target program is composed of a plurality of instructions including branch instructions.

The main memory 4 has a measurement target program composed of modules 41, 42, ..., 4n, and the start address of each module is represented by addresses S1, S2, ..., Sn, and the end address is E0. , E1, ..., En. From the start address S0, S1, ..., Sn of the module, the module names (aaaaa, bbbbb, ...
Module head identifiers 41M, 42M, ..., 4nM including n) are provided.

The instruction execution number storage unit 6 stores the module name (aaaaa, bbbbb, ..., Nnnnn) of the module constituting the measurement target program, the start address (S1, S2, ..., Sn) and the end address (E1, E2,
…, En) Module range information 61M, 62M,…, 6nM
(Corresponding to modules 41, 42, ..., 4n, respectively), an instruction string 60 indicating instruction distinction, and module range information 61M, 62M,
, 6nM corresponding to each module and corresponding to each instruction type of the instruction sequence 60 and storing the number of executions for each type of instruction 61, 62, ..., 6n (module 41, respectively Corresponding to 42, ..., 4n).

In addition, the instruction execution time correspondence table 8 includes instruction execution time correspondence information including an instruction sequence 80 indicating the instruction distinction and an instruction execution time 81 corresponding to each instruction of the instruction sequence 80 and indicating the execution time of the instruction. It is stored.

Next, the operation of the above information processing apparatus will be described.

First, assuming that the priority level of the measurement target program consisting of modules 41, 42, ..., 4n is 1, the priority level number 1 and the range (S1 address and E1 address) of the measurement target program are input from the input device 1. It The input information analysis unit 20 notifies the control unit 21 of the input priority level number 1 and the range of the measurement target program. Control unit 21 that received this notification
Sets the priority level number 1 to branch instruction interrupt mode,
The branch instruction interrupt mechanism 30 is activated, and the post-branch address (post-branch address 51) in the post-branch address storage unit 5 corresponding to the priority level number 1 is initialized to zero. Further, the range of the measurement target program is notified to the module search unit 22, and the module search unit 22 searches for the module in the range from S1 to En by the notification, and the module name (aaaaa, bbbbb, ..., nnnnn) And the start address (S
1, S2, ..., Sn) and end addresses (E1, E2, ..., En) are the module range information 61M, 62M, ..., 6nM in the instruction execution number storage unit 6.
Module range information 61M, 62M, ..., 6
Instruction execution count storage sequence 61, 62, ..., 6 corresponding to each of nM
Initialize n to zero.

After that, when the measurement target program in the main memory 4 is activated and the branch instruction is executed, the branch instruction interrupt mechanism 30 of the central processing unit 3 causes the branch instruction interrupt at the branch destination address to generate the program. Control unit 21 of the instruction execution number measuring device 2
To operate.

After the occurrence of this branch instruction interrupt, the central processing unit 3 stops the processing of the measurement target program being executed. When the branch instruction interrupt mechanism 30 notifies the control unit 21 of the priority level number 1, the pre-branch address that is the address of the branch instruction itself in the measurement target program, and the post-branch address that is the branch destination of this branch instruction. , An instruction word for analyzing an instruction within the range from the address indicated by the content of the post-branch address 51 corresponding to the priority level number 1 in the post-branch address storage unit 5 to the pre-branch address notified at the time of the branch instruction interrupt At the same time as instructing the analysis unit 23, the post-branch address notified at the time of the branch instruction interrupt is also stored in the post-branch address 51 until the next branch instruction interrupt for the priority level number 1.

After that, the instruction word analysis unit 23 analyzes the instructions within the range designated by the control unit 21, and outputs the analysis result (the number of each instruction type) to the instruction execution count storage sequence (the analyzed range is S1 address). If the address is from E1 to E1, the number is added according to the type of instruction in the instruction execution count storage string 61). At the time of the first branch instruction interrupt in which the post-branch address 51 is initialized to zero, the control unit 21 simply stores the post-branch address notified from the branch instruction interrupt mechanism 30 in the post-branch address 51. No instruction analysis instruction is given to the word analysis unit 23.

After performing the above operation, the control unit 21 instructs the branch instruction interrupt mechanism 30 to resume execution from the address after branch in the module 41, and waits for the next branch instruction interrupt.

In response to the instruction to restart the execution, the central processing unit 3 restarts the execution of the stopped program.

Here, referring to FIG. 2, the range analyzed by the command word analysis unit 23 of the program command execution number measuring device 2 is set to the module
The routine from address P0 to address P4 of 41 will be specifically described.

In the module 41, the addresses P0, P1, P2, P3 and P4 are the branch destination addresses of the branch instruction, and the addresses B1, B2, B3 and B4 are the addresses of the branch instruction itself.

First, when a branch instruction (not shown) that branches to the address P0 of the module 41 is executed, the branch instruction interrupt mechanism
A branch instruction interrupt is generated by 30, and the program instruction execution number measuring device 2 (the control unit 21 thereof) operates. The program instruction execution number measuring device 2 (the control unit 21 thereof) stores the address P0 notified from the branch instruction interrupt mechanism 30 in the post-branch address 51 (here, the operation procedure for the range before branching to the address P0 is described. Omitted).

Next, a branch instruction at the address B1 of the module 41 is executed, a branch instruction interrupt occurs at the branch destination address P1, and the program instruction execution number measuring device 2
23) is the analysis result by analyzing the instruction in the range (address P0 to address B1) between the address B1 notified from the branch instruction interrupt mechanism 30 and the address P0 stored in the post-branch address 51 at this time. (Number of each type of instruction) is added corresponding to the type of instruction in the instruction execution count storage string 61.

After this, the control unit 2 of the program instruction execution number measuring device 2 (
In 1), the address P1 notified together with the address B1 is stored in the post-branch address 51.

Similarly, the execution of the branch instruction at the addresses B2, B3, B4 causes a branch instruction interrupt at the addresses P2, P3, P4, respectively. At this time, the program instruction execution number measuring device 2 (the instruction word analysis unit 23) analyzes The address is P1
To address B2 and address P2 to address
It is the range from B3 and the range from address P3 to address B4. The branch instruction interrupt mechanism 30 notifies the address (B1, B2, B) of the branch instruction itself when the branch instruction is interrupted.
3, B4) and the branch destination address of the branch instruction (P0, P1, P2, P3, P4)
In addition, there is a priority level number (not shown) of the measurement target program 41, and the post-branch address 51 can be selected by this priority level number.

Further, since the post-branch address in the post-branch address storage unit 5 can be stored in association with the priority level, not only the above-described measurement of the measurement target program running at the priority level 1 alone but also a plurality of priority levels can be measured simultaneously. It is possible to

Finally, the measurement is completed, and the branch instruction interrupt mode release command of priority level number 1 is input from the input device 1. The input information analysis unit 20 notifies the control unit 21 of the branch instruction interrupt mode release command for the input priority level number 1. Upon receiving this notification, the control unit 21 releases the branch instruction interrupt mode of the priority level number 1 and branches to the branch instruction interrupt mechanism 30.
Is stopped and the measurement result edit output unit 24 is instructed to edit and output the measurement result for the priority level number 1. Upon receipt of this instruction, the measurement result edit output 24 calculates the execution time for each module based on the instruction execution number storage unit 6 and the instruction execution time correspondence table 8 (corresponding to each instruction type,
The execution count in the instruction execution count storage string is multiplied by the execution time in the instruction execution time correspondence table 8 and the multiplication results for each instruction are summed), and the calculation result is output to the output device 7.

Further, the instruction execution time shown in the instruction execution time correspondence table 8 varies depending on the type of computer even if it is the same instruction. Therefore, the instruction execution time should be made to correspond to each instruction type and each computer type. It is possible to configure and measure the execution time for each program for each computer type.

〔The invention's effect〕

As described above, according to the present invention, since the number of instruction executions of a program is measured by using a branch instruction interrupt, it is possible to perform measurement without knowing the content of the program.
The procedure for measurement is simple, and the time required for measurement is greatly reduced compared to the case of calculating on the desk.
In addition, since the execution time is output for each module in the list that is edited and output, it is very helpful when improving the performance of the program (particularly the control program).

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an information processing apparatus according to an embodiment of the present invention, and FIG. 2 is a related diagram for specifically explaining a range analyzed by a command word analysis unit of a program command execution count measuring device. Is. 1 ... Input device, 2 ... Program command execution number measurement device, 3
...... Central processing unit, 4 ...... Main storage device, 5 ...... Post-branch address storage unit, 6 ...... Instruction execution number storage unit, 7 ...... Output device, 8 ......
Instruction execution time correspondence table.

Claims (1)

[Claims] 1. A central processing unit that executes a program, a module head identification mechanism that indicates the head of the module at the head of all modules that make up the program, and that includes a module name, and head addresses of all the modules. Module search means for searching the module head identification mechanism to obtain an end address and a module name, and module range information for storing the head addresses, end addresses and module names of all the modules obtained by the module search means Storage means, branch instruction interrupt means for generating an internal interrupt when the central processing unit executes a branch instruction, and notifying a pre-branch address and a branch destination address of the branch instruction, and a branch instruction after branch Post-branch address storage means for storing an address; For each module in the range specified by the module range information storage means, the branch instruction interrupt means is activated when an internal interrupt is generated, and the branch instruction address and the branch instruction interrupt stored in the post branch address storage means An instruction execution number measuring means for counting the number of instructions existing within a range indicated by the pre-branch address notified from the means, and storing the post-branch address notified by the branch instruction interrupt means in the post-branch address storage means. An information processing device comprising: