JPS63300333A - Measurement system for number of times of instruction execution of program - Google Patents

Abstract

PURPOSE:To obtain reference for the performance improvement of a program (specially, a control program) by outputting not only the total number of instructions which re executed, but also the number of instructions executed in each specified measurement area (e.g., a program) by the kinds of the instructions to a list to be edited and outputted. CONSTITUTION:A program instruction execution frequency measuring instrument 2 analyzes instructions in a range between an address B1 reported from a branch instruction interrupting mechanism 30 and an address P0 stored in an after-branch address 51 at this time to adds analytic results (numbers of instructions by kinds) corresponding to the kinds of the instructions in an instruction execution frequency storage array 61. Then the program instruction execution frequency measuring instrument 2 stores an address P1 reported together with a address B1 in the after-branch address 51. An editing and output part outputs the measurement result list which is so edited that the total of executed instruction and the numbers of times of execution by the kinds of the instructions are obtained corresponding to respective measured programs according to the contents of an instruction execution frequency storage part.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for measuring the performance of a program in an information processing system, and particularly to a method for measuring the number of executed instructions of a program.

[Conventional technology]

Conventionally, in order to find out the number of instructions executed in a program, which is a standard for program performance, it is necessary to calculate the number of instructions executed while predicting the program execution process on a desk.

Another method is to measure the number of executed instructions using a hardware monitor.

[Problem that the invention seeks to solve]

As mentioned above, when calculating the number of instruction executions while predicting the program execution process on paper.

The contents of the program must be well understood, and even for a person in charge who understands the contents of the 7a program well, it requires a considerable amount of time. On the other hand, in the case of the method of measuring the number of instruction executions using a hardware monitor, preparation for measurement is troublesome, so software personnel generally do not use this method at present.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for measuring the number of executed instructions, which does not require understanding the contents of a program and can easily measure the number of executed instructions.

[Means for solving problems]

The method for measuring the number of executed instructions of a program according to the present invention includes a program range holding means that holds a specified program range (start address and end address), and a program range holding means that holds a specified program range (start address and end address). A branch instruction interrupt means that holds a priority level, a pre-branch address, and a post-branch address and generates an internal interrupt, and that can generate this internal interrupt for each of one or more priority levels; and activation of the branch instruction interrupt means. A means for setting and canceling a branch instruction interrupt mode for stopping.

A post-branch address storage means that stores post-branch addresses in correspondence with priority levels, and a pre-branch address and post-branch address storage means that are notified from the branch instruction interrupt means at the time of a 9-branch instruction interrupt, are used to store the post-branch address in correspondence with the priority level. An instruction stored at the time of an instruction interrupt and existing in the range indicated by the post-branch address corresponding to the priority level at the time of this branch instruction interrupt? An instruction analysis means for searching and analyzing the number of each type of instruction, and the number of instructions for accumulating and storing the number of each type of instruction, which is the analysis result of this instruction analysis means, for each type of instruction and for each program. It is characterized by comprising a storage means, and an editing output means for editing and outputting the number of each type of instructions cumulatively stored by the instruction number storage means for each program.

〔Example〕

Next, one embodiment of the present invention will be explained with reference to examples.

FIG. 1 is a block diagram showing the structure of an embodiment of a method for measuring the number of executed instructions of a program according to the present invention. Referring to FIG. 1, the method for measuring the number of executed instructions of a program includes an input device 1 on which an input operation is performed, an input information analysis section 20, a control section 21, a command word analysis section 22, and a measurement result editing/output section 23.
a program instruction execution count measurement device 2 including a program instruction execution count measuring device 2; and a branch instruction that holds a priority level, a pre-branch address, and a post-branch address and generates an internal interrupt before the first instruction after the branch is executed by executing the branch instruction. A central processing unit 3 including an interrupt mechanism 30, measurement target programs 41, 42 . ...
, 4n f; a post-branch address storage unit 5 that stores post-branch addresses 51, 52, . . . , 5n corresponding to each priority level until the next branch instruction interrupt; an instruction execution number storage unit 6 that stores the number of executions for each program, and a measurement result restore for each program 1.72. . . . is equipped with an output device 7 from which sin is output.

The main storage device 4 contains measurement target programs 41, 42,...
・, 4n exist, and their starting addresses are Sl, S
2. ..., Sn addresses, and the end addresses are similarly shown as EO, El, ..., En.

The instruction execution number storage unit 6 stores the start address (Sl, S2...Sn) and end address (El
, E2. ..., En) are held. Program range information 61M, 62M, -, 6nM (each 7'
o f 5m 41, 42. ..., corresponds to 4n) and
An instruction sequence 60 indicating the distinction between instructions and program range information 6
1M, 62M.

..., instruction execution number storage columns 61, 62°, which correspond to each program indicated by 6nM and correspond to each type of instruction in the instruction string 60, and store the number of executions for each type of instruction.
6n (corresponding to programs 41, 42, . . . , 4n, respectively).

Next, the operation of the method for measuring the number of program instruction executions described above will be explained. First, the program to be measured 41, 4
2. ..., 4n range (respectively 81st address and E1 address, 82nd address and E2 address, ..., Sn address and En address)
is input from input device l. The input information analysis unit 20
The control unit 21 controls the range of the input program to be measured.
to notify. Upon receiving this notification, the control unit 21 holds the range of the measurement target program in the program range information 61M, 62M, .・、
6nM instruction execution count memory array 61,
62. ..., initialize 6n with zero. Here, assuming that the priority level of the measurement target program 41 is 1,
Priority level number 1 is input from input device l. The input information analysis unit 20 uses this input priority level number lt-
The control unit 21 is notified. Upon receiving this notification, the control unit 21 sets the priority level number 1 to the branch instruction interrupt mode and starts the 1-branch instruction interrupt mechanism 30, and also after the branch corresponding to the priority level number 1 in the 1-branch post-address storage unit 5. Address 51t - Initialize with zero. Thereafter, when the measurement target program 41 in the main storage device 4 is started and the branch instruction is executed.

The branch instruction interrupt mechanism 30 of the central processing unit 3 generates a branch instruction interrupt at the branch destination address to operate the control section 21 of the program instruction execution count measuring device 2. The control unit 21 is notified by the 1-branch instruction interrupt mechanism 30 of the priority level number 1, the pre-branch address that is the address of the branch instruction itself in the measurement target program 41, and the post-branch address that is the branch destination of this branch instruction. and 1 post-branch address 51 corresponding to the priority level number l in the post-branch address storage unit 5.
Instructs the instruction word analysis unit 22 to analyze the instructions within the range from the address indicated by the content of this branch instruction to the pre-branch address notified at the time of this branch instruction interrupt, and also the post-branch address notified at the time of this branch instruction interrupt. is stored in post-branch address 51 until the next branch instruction interrupt for priority level number l. Thereafter, the instruction word analysis section 22 analyzes instructions within the range instructed by the control section 21.

This analysis result (number for each type of instruction) is added in correspondence with the type of instruction in the instruction execution count storage column 61. Note that the control unit 21 uses the 9-branch instruction interrupt mechanism 3 at the time of the first branch instruction interrupt after the 9-branch address 51 is initialized to zero.
The post-branch address notified from 0 is the post-branch address 51
It does not instruct the instruction word analysis unit 22 to analyze the instruction. After performing the above operations, the control unit 21
Instructs the branch instruction interrupt mechanism 30 to resume execution from the post-branch address in the measurement target program 41, and waits for the first branch instruction interrupt.

Here, the range to be analyzed by the instruction word analysis unit 22 of the program instruction execution count measuring device 2 is determined by the measurement target program 41.
The routine from address PO to address P4 will be explained as an example.

Referring also to FIG. 2, measurement target program address 4181~
Address PO, P1゜P2. P3
．． P4 is the branch destination address of the branch instruction.

Address Bl, B2. B3. B4 is the address of the branch instruction itself. First, when a branch instruction (not shown) that branches to the address POK of the measurement target program 41 is executed, a branch instruction interrupt is generated by the 1-branch instruction interrupt mechanism 30, and the control unit 21 of the program instruction execution count measuring device 2 (
) works. The program instruction execution count measurement device 2 (control unit 21) stores the address Po notified from the branch instruction interrupt mechanism 30 in the post-branch address 514C (here, an explanation of the operation procedure for busying the range before branching to the address PO is given). ). Next, the branch instruction at address Bl of the measurement target program 41 is executed and a branch instruction interrupt occurs at address P1, which is one branch destination, and the program instruction execution number measuring device 2 (instruction word analysis unit 22) detects the branch instruction interrupt. The range (from address PO to address B1) between the address B1 notified from the loading mechanism 30 and the address PO stored in the post-branch address 51 at this time (from address PO to address B1) is analyzed, and the analysis results (for each type of instruction) are analyzed. number) in the instruction execution count storage column 61 (the range from address PO to address Bl is
81 to E1, and the instruction execution count storage column 61 is selected). Thereafter, the program instruction execution count measuring device 2 (control unit 21 thereof) stores the notified address P1 together with the address B1 in the post-branch address 51. Similarly, address B2. B3. By executing the branch instruction of B4, addresses P2. P3. A branch instruction interrupt occurs at P4.

At this time, the range from address P1 to address B2 and the range from address P2 to address B3 are analyzed by (the instruction word analysis unit 22 of) the program instruction execution count measuring device 2, respectively.

The range is from address P3 to address B4.

Note that when a 1-branch instruction interrupts, what is notified from the branch instruction interrupt mechanism 3° is the address of the 1-branch instruction itself (Bl, B2 .
B3. B4) and the branch destination address of the branch instruction (PO, Pi
, P2. P3. In addition to P4), measurement target program 41
The post-branch address 51 can be selected by this priority level number (not shown).

Further, the post-branch address in the 1-branch post-address storage unit 5 can be stored in accordance with the priority level, and the instruction execution number storage column that stores the number of executions for each type of instruction in the instruction execution number storage unit 6 is the object of measurement. Because each program exists, it is possible to measure not only the measurement target program 41 that runs at priority level 1 described above, but also the measurement target program 42 that runs at a priority level other than 1. ..., it is possible to measure 4ni simultaneously.

Finally, the measurement is completed, and a branch instruction interrupt mode release command with priority level number 1 is input from the input device 1. The input information analysis unit 20 notifies the control unit 21 of the branch instruction interrupt mode release command for the input priority level number 1. Upon receiving this notification, the control unit 21 cancels the branch instruction interrupt mode of priority level number 1, stops the 2-branch instruction interrupt mechanism 30, and edits and outputs the measurement results for priority level number 1. The editing output unit 23 is instructed. The measurement result editing output unit 23 corresponds to each measurement target program based on the instruction execution number storage unit 6, and is configured to know the total number of executed instructions and the number of executions for each type of instruction. (Measurement results list edited in) 71, 72
．． ..., 7n is output to the output device 7.

〔Effect of the invention〕

As explained above, the present invention uses the 9-branch instruction interrupt to measure the number of instructions executed in a program, so it can be measured without knowing the contents of the program at all, and the measurement procedure is simple and easy. Moreover, the time for measurement is also significantly reduced compared to the case of desk-based calculations. In addition, the list that is edited and outputted does not simply include the total number of executed instructions, but also the number of executed instructions for each type of instruction and for each specified measurement area (for example, program). This is very useful when improving the performance of programs (especially control programs).

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a related diagram for specifically explaining the range analyzed by the instruction word analysis section of the program instruction execution count measuring device. In fig. l... Input device, 2... Zogram instruction execution number measuring device, 3... Central processing unit, 4... Main storage device, 5
. . . Post-branch address storage unit, 6 . . . Instruction execution number storage unit. 7... Output device.

Claims (1)

[Claims] 1. A program range holding means that holds a program range specified by a start address and an end address, and a program range holding means that holds a program range specified by a start address and an end address, and giving priority to running a program that includes a branch instruction before the first instruction after a branch is executed by executing a branch instruction. A branch that generates an internal interrupt by holding the level, a pre-branch address that is the address of the branch instruction itself, and a post-branch address that is the branch destination address of the branch instruction, and generates the internal interrupt for each of one or more of the priority levels. an instruction interrupt means, a branch instruction interrupt mode setting release means for starting and stopping the branch instruction interrupt means, a post-branch address storage means for storing the post-branch address in correspondence with the priority level, and a branch instruction The pre-branch address notified from the branch instruction interrupt means at the time of an interrupt and the post-branch address stored by the branch address storage means at the time of a branch instruction interrupt immediately before the branch instruction interrupt, and correspond to the priority level at the time of the branch instruction interrupt. an instruction analysis means for searching for instructions existing in the range indicated by the post-branch address and analyzing the number of instructions for each type of instruction; a number storage means for accumulating and storing instructions for each program and corresponding to each program held by the program range holding means, and editing the number of each type of instructions cumulatively stored by the instruction number storage means for each program; 1. A method for measuring the number of executed instructions of a program, comprising: an editing output means for outputting an output.